Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Patent
1999-03-24
2000-08-01
Monin, Jr., Donald L.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
257297, 257372, 438220, 438525, H01L 2702, H01L 218238
Patent
active
060970782
ABSTRACT:
A method is provided for forming a triple well of a semiconductor memory device, where a second well of a second conductive type encloses a second well of a first conductive type. A single mask is used for ion implanting the base of the enclosing well and also the entire enclosed well, which inherently avoids misalignment. Additional doping is provided to the location where the sidewalls of the enclosing well join its base. This is accomplished either by a second, deeper ion implant of the sidewalls, or by ion implanting the base at an angle and rotating it, or both. Alternately, the single mask pattern is processed between the ion implantation steps to alter its width.
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patent: 5518941 (1996-05-01), Lin et al.
patent: 5831313 (1998-11-01), Han et al.
patent: 5972745 (1999-10-01), Kalter et al.
Lee Won-saong
Sim Sang-pil
Monin, Jr. Donald L.
Samsung Electronics Co,. Ltd.
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