Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-03-06
2003-04-29
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S638000, C438S672000
Reexamination Certificate
active
06555468
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a method for manufacturing semiconductor devices, and more particularly, to a method for forming trench in semiconductor devices.
BACKGROUND OF THE INVENTION
With the fast developments of semiconductor manufacturing process techniques, the dimensions of integrated circuits (ICs) are rapidly scaled down into sub-micron level. Oxide isolation of IC is increasingly important, particularly isolation of active areas of IC devices during the period of semiconductor processes. In general, a local oxidation (LOCOS) process is employed to form these oxide isolation regions, but the LOCOS process may induce a bird's beak structure such that the active areas of devices are unacceptably encroached.
Therefore, a trench process is widely used by semiconductor manufacturers to form isolation structure between active areas. Unfortunately, the conventional process of manufacture for trench is too complicated to control the stability of the process. Furthermore, the deviation of alignment mark is easily induced when the photo mask is being aligned in the process period. The conventional manufacturing processes of trench are shown in
FIG. 1
to FIG.
6
.
Referring to
FIG. 1
, a first silicon oxide (SiO
2
) layer
12
, a silicon nitride (Si
3
N
4
)
14
and a second silicon oxide layer
16
are sequentially deposited on a semiconductor substrate
10
.
Referring to
FIG. 2
, a first photoresist layer
20
is spun on the second silicon oxide layer
16
, and then a photolithography process and dry etching is employed to form a recess
22
on the second silicon oxide layer
16
wherein the silicon nitride layer
14
is used as an etching stop layer.
Referring to
FIG. 3
, the first photoresist layer
20
is removed to form a first opening
30
.
Referring to
FIG. 4
, the second photoresist layer
40
is coated on the second silicon oxide layer
16
and the first opening
30
.
Referring to
FIG. 5
, a second opening
50
is formed on the silicon nitride layer
14
and the first silicon oxide layer
12
by using a photolithography and dry etching process until the semiconductor substrate
10
is exposed.
Finally, referring to
FIG. 6
, the trench
60
, composing of the first
30
and the second opening
50
, is formed as the second photoresist layer
40
is removed.
According to the mentioned-above, the conventional process of trench
60
makes use of two coated-photoresist steps to form the first and the second patterns with respect to the first
30
and the second
50
opening respectively. Afterwards, two photolithography and dry etching steps are implemented to form the trench
60
including the first
30
and the second opening
50
. As a result, the conventional process of the trench
60
is carried out with additional phototresist removal, using two steps of stripping photoresist layer (
20
,
40
), which increased the difficulty of the process and the manufacturing process cost.
Furthermore, when using photo mask alignment, an alignment mark deviation between the first opening
30
and the second opening
50
is usually induced, causing a asymmetric trench
60
structure, such that the filling of trench
60
is decreased seriously, which may substantially downgrade the isolation effect of ICs.
SUMMARY OF THE INVENTION
In view of the problems encountered with the foregoing conventional trench isolation.
As a result, the primary object of the present invention is to provide a new method of forming trench to decrease manufacturing steps and cost.
Another object of the present invention is forming a symmetric trench structure to increase the filling ability of the trench and easily control the consequent processes.
According to the above objects, the present invention discloses a method of fabricating trench. A first inter-metal dielectrics (IMD) layer, a mask layer and a second IMD layer are formed sequentially on a semiconductor substrate. Afterwards, a first phototresist layer is formed on the second IMD layer. A photolithography and etching process are performed to transfer a photo mask pattern to form a first opening inside the IMD layer wherein the mask layer serves as an etching stop layer. Thereafter, a second phototresist layer is formed on the second IMD layer and inside the first opening sidewall. A portion of the second phototresist layer on the first IMD layer is removed, and simultaneously the mask layer and the first IMD layer is etched to form a second opening until the semiconductor substrate is exposed. Finally, the first phototresist layer and the second phototresist layer are stripped simultaneously so as to form a trench having the first opening and the second opening.
In summary, the present invention offers a method of fabricating the trench having a lot of benefits such as a decreasing manufacturing steps, a conformal surface of the phototresist layer and a symmetric trench structure.
REFERENCES:
patent: 6063711 (2000-05-01), Chao et al.
patent: 6180516 (2001-01-01), Hsu
patent: 6287960 (2001-09-01), Lao
Brewster William M.
Chaudhuri Olik
Macronix International Co. Ltd.
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