Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-09-12
1999-06-22
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, 438410, 438437, 148DIG50, H01L 2176
Patent
active
059151927
ABSTRACT:
A method of forming a trench isolation is disclosed. The initial step includes forming a first dielectric layer on a substrate of a transistor followed by a second dielectric layer formed on the first dielectric layer. Next, the substrate, the first dielectric layer and the second dielectric layer is patterned and etched to form a trench in the substrate, the first dielectric layer and the second dielectric layer. Next, a third dielectric layer is formed on the surface of the side wall of the trench followed by isotropically etching the bottom of the trench. Finally, a fourth dielectric layer on the surface of the trench is formed and the trench is filled with a dielectric material.
REFERENCES:
patent: 4604162 (1986-08-01), Sobczak
patent: 4615746 (1986-10-01), Kawakita et al.
patent: 4685198 (1987-08-01), Kawakita et al.
Lee Jin-Yuan
Liaw Jhon-Jhy
Dang Trung
Taiwan Semiconductor Manufacturing Co. Ltd.
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