Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1998-04-14
2000-08-08
Fahmy, Wael
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438664, 438666, 438674, 438683, H01L 2144
Patent
active
061001910
ABSTRACT:
The present invention discloses a method to manufacture a self-aligned silicide layer on a substrate. A metal oxide semiconductor (MOS) device and a shallow trench are fabricated in the substrate. The device has a gate structure, spacers of the gate structured and doping regions. The shallow trench is refilled with silicon oxide material for isolation. A silicon layer is nonconformally deposited on the top surface of the gate structure, the spacers and the doping regions by using a physical vapor deposition (PVD) process, such as ion metal plasma (IMP) process. The IMP process, like a sputtering process, is to ionize a silicon material or a refractory-metal material to silicon ions or metal ions and the ions are biased to anisotropically deposit on the top surface of the substrate. A refractory metal layer is defined on the top surface of the silicon layer by the IMP technology. A two-step thermal annealing process, such as rapid thermal annealing (RTA) process is performed to convert the silicon layer and the refractory metal layer into a silicide layer. Since the silicon layer serves as a silicon source for the salicide process, the silicide layer can form on the spacers and the silicon oxide material of the trench.
REFERENCES:
patent: 4873204 (1989-10-01), Wong et all
patent: 4873205 (1989-10-01), Critchlow et al.
patent: 5494860 (1996-02-01), McDevitt et al.
patent: 5668065 (1997-09-01), Lin
patent: 5691212 (1997-11-01), Tsai et al.
patent: 5756391 (1998-05-01), Tsuchiaki
patent: 5759899 (1998-06-01), Saito
patent: 5966607 (1999-10-01), Chee et al.
Lin Tony
Lu Hsiao-Lin
Lur Water
Wu Jiun-Yuan
Eaton Kurt
Fahmy Wael
United Microelectronics Corp.
LandOfFree
Method for forming self-aligned silicide layers on sub-quarter m does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming self-aligned silicide layers on sub-quarter m, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming self-aligned silicide layers on sub-quarter m will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1149937