Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1995-12-27
1997-04-08
Kunemund, Robert
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
216 41, 216 46, 438694, 438704, 438948, C23F 100
Patent
active
056183844
ABSTRACT:
A method for forming a residue free patterned conductor layer upon a high step height integrated circuit substrate. First, there is provided a semiconductor substrate having formed thereon a high step height patterned integrated circuit layer. Formed upon the high step height patterned integrated circuit layer is a blanket conductor layer, and formed upon the blanket conductor layer is a patterned photoresist layer. The portions of the blanket conductor layer exposed through the patterned photoresist layer are etched through an anisotropic etch process to leave remaining a patterned conductor layer upon the surface of the high step height patterned integrated circuit layer and conductor layer residues at a lower step level of the high step height patterned integrated circuit layer. The patterned photoresist layer is then reflowed to cover exposed edges of the patterned conductor layer. Finally, the conductor layer residues at the lower step level of the high step height patterned integrated circuit layer are removed through an isotropic etch process.
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Chan Lap
Zhou Met S.
Alanko Anita
Chartered Semiconductor Manufacturing Pte Ltd.
Kunemund Robert
Saile George O.
Szecsy Alek P.
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