Method for forming pseudo buried layer for sub-micron bipolar or

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including isolation structure

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438202, 438297, 438298, 438308, 438225, 438370, 438378, 438526, 438530, 438555, 438771, 438756, 438757, 438788, 438792, 438795, H01L 21331

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058560033

ABSTRACT:
A process is described for forming a heavily doped buried element below an active device region of a silicon wafer without the use of costly epitaxial layers and without incurring ion implantation damage within active device regions. The method is particularly applicable to active device regions which have small lateral dimensions. Thus, the technological trend towards shrinking devices favors the incorporation of the process of the invention. The process utilizes a silicon nitride hardmask to define a narrow band around the perimeter of the device active area. A deep implant is performed through this mask, placing a ring of dopant below and outside the active area. The silicon nitride hardmask is then patterned a second time to define the conventional field oxide isolation regions. The LOCOS field oxidation is then performed whereby the implanted dopant diffuses vertically, engaging the field oxide around the perimeter of the device region and laterally filling in the region under the device active area. The novel process is used to the form buried collectors for high performance bipolar transistors including BiCMOS applications.

REFERENCES:
patent: 4508757 (1985-04-01), Fabricius et al.
patent: 4902639 (1990-02-01), Ford
patent: 5326710 (1994-07-01), Joyce et al.
patent: 5580798 (1996-12-01), Grubisich
S. Wolf, "Silicon Processing For The VLSI Era" vol. 2, Lattice Press, Sunset Beach, CA, 1990, pp. 531, 586.

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