Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1995-05-08
2000-12-12
Tsai, Jey
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438131, 438467, H01L 2900
Patent
active
061598364
ABSTRACT:
A programmable semiconductor contact structure and method are provided. A semiconductor substrate has a first patterned conductive layer for forming an interconnect. A first insulating layer overlies the first patterned conductive layer. An opening is formed through the insulating layer to the first patterned conductive layer to form the contact via. A buffer layer overlies portions of the first insulating layer and covers the opening. A second conductive layer overlies the buffer layer. A third conductive layer then overlies the integrated circuit. The buffer layer is a material, such as amorphous silicon, which functions as an anti-fuse and can be programmed by application of a relatively high programming voltage.
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Richard Wong et al., "Evaluating the Reliability of the QuickLogic Antiguse", Electronic Engineering, No. 786, Woolwich, London, Great Britain, Jun. 1992, pp. 49, 51, 53, 54 and 56.
Galanthay Theodore E.
Jorgenson Lisa K.
STMicroelectronics Inc.
Tsai Jey
Venglarik Dan
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