Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2005-08-02
2005-08-02
Baumeister, B. William (Department: 2829)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S286000, C438S222000, C438S585000, C438S197000, C438S296000, C438S509000
Reexamination Certificate
active
06924219
ABSTRACT:
A method for forming a polysilicon germanium layer on a gate oxide layer without forming a polysilicon seed layer previously is disclosed. The method uses a chemical vapor deposition process at a temperature range between about 500° C. to about 600° C. by using a Si2H6(disilane) gas and a germanium-containing gas as precursors to form a polysilicon germanium layer on a gate dielectric layer as a gate electrode layer. The polysilicon germanium layer directly formed on the gate dielectric layer has a smooth surface.
REFERENCES:
patent: 2002/0173130 (2002-11-01), Pomerede et al.
Cheng Li-Wei
Chu Kuo-Tung
Baumeister B. William
Intellectual Property Solutions Incorporated
United Microelectronics Corp.
Yevsikov Victor V.
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