Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1999-02-08
2000-05-30
Fourson, George
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438532, 438593, H01L 2128, H01L 21336
Patent
active
060690615
ABSTRACT:
A method is provided for forming a polysilicon gate. A stacked gate with a first polysilicon layer/an oxide layer/a second polysilicon layer multiple structure is formed. The invention provides another method for forming a polysilicon gate, in which a first polysilicon layer is formed and waits for a period of time. Then, a second polysilicon layer is formed on the first polysilicon layer. A grain boundary is formed between the first polysilicon layer and the second polysilicon layer. The invention provides still another method for forming a polysilicon gate, in which a polysilicon layer is formed at the temperature of about 600-700.degree. C. and the pressure of about 1-5 torr to form a small-grained polysilicon layer. The three methods for forming a polysilicon gate can prevent the heavy ions from passing through the polysilicon gate and the gate oxide layer into the substrate while performing a pre-amorphization implant process. The absence of these heavy ions in the substrate avoids the subthreshold kink side-effect.
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patent: 5736442 (1998-04-01), Mori
Lin Tony
Lur Water
Abbott Elizabeth
Fourson George
United Microelectronics Corp.
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