Method for forming patterns in semiconductor memory device

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S689000, C438S700000, C438S737000, C438S738000, C216S013000, C216S041000, C216S058000

Reexamination Certificate

active

07968467

ABSTRACT:
A method for forming patterns in a semiconductor memory device, wherein first spacers arranged at a first spacing and second spacers arranged at a second spacing are formed on a target layer which is formed on a semiconductor substrate. A mask pattern is formed to cover a portion of the target layer defined by the two adjacent second spacers. At least two first patterns and at least one second pattern is formed by patterning the target layer using the first spacers, the second spacers and the mask pattern as an etch mask. Here, the second pattern is wider than the first pattern.

REFERENCES:
patent: 6329124 (2001-12-01), Rangarajan et al.
patent: 7300837 (2007-11-01), Chen et al.
patent: 2003/0230234 (2003-12-01), Nam et al.
patent: 2008/0085612 (2008-04-01), Smythe et al.
patent: 2008/0261156 (2008-10-01), Ryou et al.
patent: 10-0261167 (2000-04-01), None
patent: 10-2002-0024415 (2002-03-01), None

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