Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2001-12-06
2003-10-28
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S775000
Reexamination Certificate
active
06638879
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method for forming a silicon nitride spacer, and in particular to a method for forming a silicon nitride spacer by atomic layer deposition.
2. Description of the Prior Art
In conventional very large semiconductor integrated circuit (VLSI) process, silicon nitride (Si
3
N
4
) is a widely used dielectric material in integrated circuit (IC) fabrication process. It is usually used as a spacer to serve as an etching mask of SiO
2
. Because of the advantageous characteristic of not being penetrated by oxygen, silicon nitride can also be used as a mask layer for preventing the active area from oxidation.
The LPCVD (low pressure chemical vapor deposition) is a deposition method in depositing the silicon nitride film. Traditional LPCVD process for forming silicon nitride is shown in
FIG. 1A
to FIG.
1
D.
In
FIG. 1A
, first providing a MOS (metal oxide semiconductor) structure with a p-type substrate
201
, a gate structure consisting of a poly layer
203
and SiO2 dielectric layer
205
, a field oxidation (FOX) layer
209
, and a p+ type channel stop layer
211
beneath the field oxidation layer
209
, are stepwise formed on the surface of a wafer. Then, in the next step, using the gate as a mask, a lightly doped drain (LDD) of ion implantation of Br
−
213
is carried out using the gate as a mask to implant under beneath the rest area of the wafer except gate and field oxidation region
209
.
In
FIG. 1B
, the wafer is sent to furnace by LPCVD method to form a silicon nitride layer, the formation of silicon nitride layer is usually conducted at a high temperature of about 700 to 800° C.
In the LPCVD process, as shown in
FIG. 2
, there are two kinds of gases involve in the deposition process, the first gate could be silane or dichlorosilane (SiH
2
Cl
2
)
217
, and the other gas is ammonia (NH
3
)
219
. The standard procedure for LPCVD is to use dichlorosilane or silane
217
and ammonia
219
together as the reactant gases. When the reaction begins, an ideal stoichiometry solid phase product of silicon nitride film
213
is deposited on the wafer.
Returning to
FIG. 1C
, a layer of silicon nitride
203
is globally formed on the wafer through the chemical reaction of silane or dichlorosilane and ammonia gas by LPCVD.
In
FIG. 1D
, partially etching and removing the silicon nitride layer
223
thus forming a silicon nitride spacer
223
A near the gate.
During the LPCVD process, however, due to various different pattern density of circuit distribution on the wafer as shown in FIG.
3
. There is an isolated region
301
and a dense region
303
co-exists on the wafer surface. Normally, the memory array lie on the isolated regions
301
and the peripheral circuits lie on the dense regions
303
. When LPCVD process is conducted, the flow of the reactant gases (include dichlorosilane and ammonia or silane and ammonia) will run through the isolated and dense regions of the wafer surface. It is easily understood that the depth of the deposited film on the wafer surface largely varies with the reactant flows that run through the different density distribution area because of diffusion loading effect.
The deposited film of silicon nitride in the dense region is thinner than that of the isolated region due to the diffusion effect of the reactant flow. Ii also shows that the deposition depth on the sidewall area is thinner than the deposition depth of the rest areas. This effect makes an inhomogeneous coverage of the deposited silicon nitride distribution. This inhomogeneous coverage could result a bas consequence in the future fabrication process.
Another defect associated with LPCVD method is the high temperature thermal process involved in the chemical reaction. Because the high temperature thermal process will force Br
−
ion to penetrate into a deeper depth of the gate oxidation layer, thus making a leakage current occur in the gate oxide regions.
The other defect of LPCVD is the crack phenomena that occur when Si3N4 is deposited. If the deposited depth of the Si3N4 film is too thick, the tensile stress imbalance results a crack in the structure of the silicon nitride film.
In light of the foregoing, there is a need in the art for an improved process.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming a silicon nitride spacer by atomic layer deposition that substantially prevents the defect such as inhomogeneous coverage of silicon nitride film, silicon nitride crack, and leakage current problem associated with the conventional LPCVD method (low pressure chemical vapor deposition method).
It is an object of this invention to provide a method for forming a silicon nitride spacer.
It is another object of this invention to provide a method for forming a silicon nitride spacer without the defects of crack, leakage current, and high temperature problems.
According to the foregoing objects, the present invention provides a method for forming a silicon nitride spacer by using atomic layer deposition method (ALD).
In this invention, the ALD (atomic layer deposition) method is applied to the formation of a silicon nitride spacer. It shows, first providing a first excess gas of A(g), for example, silane (SiH
4
) gas is introduced onto the substrate surface and produce a chemical reaction of a first mono solid phase layer A(s), for example, solid silicon (Si) deposited on the wafer surface. After the completion of the first chemical reaction to produce the first mono solid phase layer A(s), the first excess gas of A(g) is drawn out from the furnace. Then, another second gas of B(g), for example, ammonia gas is introduced onto the surface of the first mono solid phase layer A(s), for example, nitride and produce a chemical reaction of the second mono solid phase layer B(s) on the surface of the first mono solid phase layer A(s). After the completion of the second chemical reaction to produce a second mono solid phase layer B(s), the second excess gas of B(g) is drawn out from the furnace. Then, repeat this fabrication cycle, a layer of A(s), B(s), and A(s), B(s) are stepwise covered on the surface of the wafer thus gradually forming silicon nitride layer. This kind of the process is to introduce one kind of air to produce one deposition layer is sequentially. The surface chemical reaction ends automatically as long as the reaction is completed. It is to be mentioned here that during the chemical reactions, the extra excess air of each releasing air would do no further contribution in the formation of the deposited solid phase products as long as the reaction of the solid phase deposition is completed. So, there will be no inhomogeneous coverage result in ALD method.
Although the depositing task of ALD is a time consuming task in the VLSI generation of 0.35 or 0.5 &mgr;m, however, in the present generation of 0.13, 0.18 &mgr;m or beyond. The associated devices are getting smaller than ever before, the ALD deposition is just right time to meet the demand of the device reducing size of VLSI ages.
REFERENCES:
patent: 6440860 (2002-08-01), DeBoer et al.
patent: 6455389 (2002-09-01), Huang et al.
Hsieh Jung-Yu
Lin Chin-Hsiang
Macronix International Co. Ltd.
Perkins Pamela E
Zarabian Amir
LandOfFree
Method for forming nitride spacer by using atomic layer... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming nitride spacer by using atomic layer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming nitride spacer by using atomic layer... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3138139