Method for forming multi-layer interconnections

Details Method for forming multi-layer interconnections Method for forming multi-layer interconnections

1996-01-16

1997-12-23

Powell, William

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

1566431, 1566441, 216 38, 437228, H01L 2100

Patent

active

057003491

ABSTRACT:
A method of forming a multi-layer interconnection in which through-holes are formed in an interlayer insulating layer positioned between two neighboring mid interconnection layers, which through-hole is used for establishing an electrical interconnection between upper and lower interconnection layers, comprising the steps of forming an offset insulating film on said mid interconnection layer such that the patterns of the mid interconnection layer and the offset insulating film are the same; forming a sidewall insulating film on the lateral wall surface of a pattern made up of said mid interconnection layer and the offset insulating film; substantially conformally forming an etch stop layer covering the entire surface of the substrate, said etching stop layer being slower in etch rate than said interlayer insulating film; anisotropically etching said interlayer insulating film in a region having an opening size smaller than the spacing between the interconnecting layers; selectively removing the etching stop layer exposed on the bottom surface of said region for completing the through-hole; and filling said through-hole with an electrically conductive material.

REFERENCES:
patent: 5246883 (1993-09-01), Lin et al.
patent: 5250472 (1993-10-01), Chen et al.
patent: 5308793 (1994-05-01), Taguchi et al.
patent: 5573633 (1996-11-01), Gambino et al.

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