Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2011-07-26
2011-07-26
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257SE21090, C977S938000
Reexamination Certificate
active
07985632
ABSTRACT:
A method for forming a wire in a layer based on a monocrystalline or amorphous material. The method forms two trenches in the layer, crossing through one face of the layer, separated from each other by one portion of the layer, by an etching of the layer on which is arranged an etching mask, and anneals, under hydrogenated atmosphere, the layer, the etching mask being maintained on the layer during the annealing. The depths and widths of the sections of the two trenches, and the width of a section of the portion of the layer, are such that the annealing eliminates a part of the portion of the layer, the two trenches then forming a single trench in which a remaining part of the portion of the layer forms the wire.
REFERENCES:
patent: 5965914 (1999-10-01), Miyamoto
patent: 2005/0275010 (2005-12-01), Chen et al.
patent: 2006/0019459 (2006-01-01), Vinet et al.
patent: 2006/0049429 (2006-03-01), Kim et al.
patent: 2007/0105321 (2007-05-01), Lee et al.
patent: 2009/0124050 (2009-05-01), Dornel et al.
Ming-Chang M. Lee, et al., “Thermal Annealing in Hydrogen for 3-D Profile Transformation on Silicon-on-Insulator and Sidewall Roughness Reduction”, Journal of Microelectromechanical Systems, vol. 15, No. 2, XP-002454307, Apr. 2006, pp. 338-343.
Ming-Chang M. Lee, et al., “Silicon Profile Transformation and Sidewall Roughness Reduction Using Hydrogen Annealing”, Micro Electro Mechanical Systems, MEMS, 18thIEEE International Conference, XP010811919, Jan. 30-Feb. 3, 2005, pp. 569-599.
Tsutomu Sato, et al., “Micro-structure Transformation of Silicon: A Newly Developed Transformation Technology for Patterning Silicon Surfaces using the Surface Migration of Silicon Atoms by Hydrogen Annealing”, Japanese Journal of Applied Physics, The Japan Society of Applied Physics, vol. 39, No. 9A, Part 1, XP-000977143, Sep. 2000, pp. 5033-5038.
Tsutomu Sato, et al., “Fabrication of Silicon-on-Nothing Structure by Substrate Engineering Using the Empty-Space-in-Silicon Formation Technique”, Japanese Journal of Applied Physics, The Japan Society of Applied Physics, vol. 43, No. 1, XP-001191452, Jan. 13, 2004, pp. 12-18.
Th Stelzner, et al., “Growth of silicon nanowires by chemical vapour deposition on gold implanted silicon substrates”, Nanotechnology, Institute of Physics Publishing, vol. 17, No. 12, Jun. 28, 2006, pp. 2895-2898.
Barbe Jean-Charles
De Crecy Francois
Dornel Erwan
Eymery Joel
Commissariat a l''Energie Atomique
Enad Christine
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Smith Matthew
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