Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-10-28
2002-01-22
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000, C438S637000, C438S633000, C438S626000
Reexamination Certificate
active
06340636
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for forming a metal line in a semiconductor device.
2. Background of the Related Art
Referring to
FIG. 1
a
, in a related art method for forming a metal line, a metal layer
2
of aluminum is deposited on an oxide film
1
, and a positive photoresist
3
is coated on the metal layer
2
, and subjected to selective patterning by exposure and development using a dark tone mask so that the positive photoresist
3
masks a portion in which a metal line is to be formed. Then, as shown in
FIG. 1
b
, the patterned resist
3
is used as a mask in etching the metal layer
2
, to form a plurality of metal lines
2
a
. Thereafter, the photoresist
3
is removed and the same process is repeated to form multilayered metal lines.
However, due to limitations in electrical properties of aluminum used for the metal line, copper has been used for a material of the metal. line. It is difficult to form a metal line of copper by a general method for forming a metal line due to a poor etchability of copper. Because of this reason, a process is employed in which an interlayer material is deposited firstly before formation of a metal line layer, a portion of the interlayer material in which the metal line layer is to be formed is etched, and a metal is stuffed in the etched portion, and planarized, which process is called a dual damascene process.
A related art method for forming a metal line by a dual damascene process will be explained with reference to the attached drawings.
FIGS. 2
a
~
2
d
illustrate sections showing the steps of a related art method for forming a metal line in a semiconductor device.
Referring to
FIG. 2
a
, a second oxide film
12
is deposited on a first oxide film
11
having a via hole and a trench formed therein and a photoresist film
13
is coated on the second oxide film
12
. Then, the photoresist film
13
is removed by exposure and development to remove portions in which metal lines are to be formed only. The removal of the portions in which the metal lines are to be formed is called as a negative tone patterning. The negative tone patterning of the photoresist film
13
can be conducted in combination of a positive resist and a clear tone mask or a negative resist and a dark tone mask. As shown in
FIG. 2
b
, the patterned photoresist film
13
is used as a mask in etching the second oxide film
12
to form a negative tone structure. As shown in
FIG. 2
c
, the second oxide film
12
is used as a mask in depositing a metal layer
14
of, such as copper Cu, on an entire surface. As shown in
FIG. 2
d
, the metal layer
14
and the second oxide film
12
are planarized to form a metal line layer
14
a.
However, the related art method for forming a metal line in a semiconductor device has the following problems.
First, in a case when a negative tone form is formed in a positive photoresist film, it is difficult to remove the photoresist from the via hole or the trench completely by development.
Second, in a case when a negative tone form is formed in a negative photoresist film, a portion which is not exposed is dissolved to make a difference of critical dimensions the greater as a pattern density becomes the greater due to interference of incident lights in formation of a micron pattern. Because of this reason, there has been a limitation in a resolution in formation of the micron pattern and it is difficult to overcome optical proximity and to form a line form of pattern.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for forming a metal line in a semiconductor device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method for forming a metal line in a semiconductor device, in which a resolution is improved for securing a design rule and minimizing a difference of critical dimensions.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the method for forming a metal line in a semiconductor device includes the steps of (1) forming a first insulating film and a second insulating film on a substrate, (2) etching the second insulating film to form a second insulating film pattern, (3) depositing a third insulating film on the second insulating film pattern, (4) removing the second insulating film pattern, and (5) forming a metal line layer in a region having the second insulating film pattern removed therefrom.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 4789648 (1988-12-01), Chow et al.
patent: 5518963 (1996-05-01), Park
patent: 5578523 (1996-11-01), Fiordalice et al.
patent: 5821164 (1998-10-01), Kim et al.
Hyundai Microelectronics Co., Ltd.
Morgan & Lewis & Bockius, LLP
Nguyen Thanh
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