Method for forming metal line in a semiconductor device

Details Method for forming metal line in a semiconductor device Method for forming metal line in a semiconductor device

2006-12-28

2009-12-15

Nguyen, Ha Tran T (Department: 2829)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S676000, C438S785000, C257SE21204

Reexamination Certificate

active

07632754

ABSTRACT:
A method for forming a metal line of a semiconductor device includes forming an interlayer insulation film over a semiconductor substrate, forming a trench for exposing at least a portion of the semiconductor substrate by using a selective etching process, and forming a diffusion barrier layer over the interlayer film and the inner walls of the trench, by using a plasma enhanced atomic layer deposition process in which a high frequency power generator is set to have a frequency of 13.56 MHz. The plasma enhanced atomic layer deposition process is performed with a base pressure in a chamber maintained at 1×10−8to 3×10−7torr.

REFERENCES:
patent: 2005/0124154 (2005-06-01), Park et al.
patent: 2006/0091559 (2006-05-01), Nguyen et al.
patent: 2006/0211228 (2006-09-01), Matsuda
Rossnagel et a., “Plasma-enhanced atomic layer deposition of Ta and Ti for interconnect diffusion barriers”, J. Vac. Sci. Technol. B 18(4), Jul./Aug. 2000, pp. 2016-2020.

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