Method for forming metal line in a semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S580000, C438S584000, C438S616000

Reexamination Certificate

active

06551932

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a metal line in a semiconductor device, and more particularly, to a method for forming a metal line in a semiconductor device in which a copper (Cu) thin film is deposited on a diffusion barrier film after a chemical enhancer and plasma are applied thereon, thereby improving fill characteristics of a contact hole having an ultra-fine structure.
2. Background of the Art
With the trend for high performance in advanced semiconductor devices, the size of a contact hole has been reduced and its aspect ratio has increased. In this respect, excellent step coverage is required and it is necessary to fill the contact hole.
A Cu thin film is mainly used as a metal line material in such advanced semiconductor devices. A method for forming a Cu thin film will briefly be described below. An interlevel insulating film is formed on a semiconductor substrate having a predetermined structure. The interlevel insulating film is patterned by a single damascene process or dual damascene process to form a damascene pattern. A diffusion barrier film is formed on the interlevel insulating film in which the damascene pattern has been formed. The diffusion barrier film, Ta or TaN, can be formed by a physical vapor deposition (PVD) method. Then, Cu thin film is deposited by an electroplating method.
However, the electroplating method fails to deposit the Cu film in a contact hole having an ultra fine structure. Therefore, a method for depositing a Cu thin film by a chemical vapor deposition (CVD) method has been researched. The CVD method still has problems in that it has low deposition rate and high cost. To solve this, a Cu thin film can be deposited by a chemical enhancement CVD (CECVD) method using a chemical enhancer such as iodine.
However, the CECVD method has uneven fill characteristics when filling a contact hole having an ultra fine structure as shown in
FIGS. 1 and 2
.
FIG. 1
shows uneven fill characteristics of a contact hole having an ultra fine structure in which a Cu thin film is deposited by the CECVD method using a chemical enhancer treated for 1 to 30 seconds.
FIG. 2
shows an example of a Cu thin film deposited by the CECVD method in which a chemical enhancer is treated for 30 to 100 seconds.
SUMMARY Of THE INVENTION
Accordingly, the present invention is directed to a method for forming a metal line of a semiconductor device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
Embodiments consistent with the present invention provide a method for forming a metal line in a semiconductor device in which a contact hole having an ultra fine structure can be uniformly filled.
Embodiments consistent with the present invention also provide a method for forming a metal line in a semiconductor device in which a contact hole having an ultra fine structure can be uniformly filled when Cu is deposited by CECVD method in which a chemical enhancer is treated.
Embodiments consistent with the present invention also a method for forming a metal line in a semiconductor device in which a Cu thin film is deposited by treating with plasma after treating with a chemical enhancer such as iodine, thereby uniformly filling a contact hole having an ultra fine structure.
Additional advantages and features of the embodiments will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. Advantages of the invention may be realized and attained as particularly pointed out in the claims.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method for forming a metal line in a semiconductor device according to an embodiment of the present invention comprises forming an interlevel insulating film on a semiconductor substrate having a predetermined lower structure, forming a damascene pattern in an interlevel insulating film, forming a diffusion barrier film on a whole structure having the damascene pattern, treating with a chemical enhancer the diffusion barrier film to form a chemical enhancer film on the diffusion barrier film, performing a plasma treatment, forming a Cu thin film on the whole structure to fill the damascene pattern, and performing polishing process to expose an upper surface of the interlevel insulating film so that the Cu film remains only within the damascene pattern.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 6110817 (2000-08-01), Tsai et al.
patent: 6133144 (2000-10-01), Tsai et al.
patent: 6136708 (2000-10-01), Aoki
patent: 6180524 (2001-01-01), Ferrell
patent: 6211085 (2001-04-01), Liu
patent: 6251759 (2001-06-01), Guo et al.
patent: 6251786 (2001-06-01), Zhou et al.
patent: 6265319 (2001-07-01), Jang
patent: 6271135 (2001-08-01), Palmans et al.
patent: 0 989 203 (2000-03-01), None
patent: WO 01/45149 (2001-06-01), None

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