Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2000-03-03
2002-01-29
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
Reexamination Certificate
active
06342440
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more specifically, it relates to a method of manufacturing a semiconductor device including a high-temperature heat treatment.
2. Description of the Prior Art
In order to increase the degree of integration and the speed of a semiconductor device, further reduction of the design rule is recently being studied. Prototypes of a 256M-DRAM (dynamic random access memory) and a CMOS (complementary metal oxide semiconductor) transistor having a gate length of 0.1 &mgr;m are announced nowadays. With such progress in refinement of the transistor, reduction of the device size along a scaling rule and following increase of the operating speed are expected.
When simply reducing the size of the transistor, channel resistance can be reduced. In this case, however parasitic resistance of an impurity diffusion layer for forming a source/drain region or resistance (contact resistance) in a contact part between conductors can become equivalent to or greater than the channel resistance, thus obstructing an increase of the operating speed. In order to increase the operating speed while implementing refinement of the transistor size, the resistance of a gate wire (electrode) must be reduced.
In general, a salicide (self-aligned silicide) method is proposed as a method of simultaneously reducing parasitic resistance of a source/drain region and wiring resistance of a gate electrode (T. Yoshida et al., J. Electrochemi. Soc., Vol. 137, No. 6 (1990), pp. 1914-1917). The salicide method is a technique of forming metal silicide films of low resistance on the gate electrode and the source/drain region in a self-aligned manner.
In a conventional p-channel MOS transistor having a salicide structure, titanium silicide films, for example, are formed on the surfaces of a source/drain region and a gate electrode, whereby parasitic resistance of the source/drain region and wiring resistance of the gate electrode can be simultaneously reduced.
When employing such a salicide technique, however, the bottom surface of the silicide film cuts into the surface of the source/drain region (impurity diffusion layer), and hence the junction surface of the source/drain region (impurity diffusion layer) must be increased in depth. When increasing the depth of the junction surface of the source/drain region, however, a source-to-drain leakage current (transverse leakage current) is disadvantageously increased. When reducing the depth of the junction surface of the source/drain region in order to avoid this problem, a leakage current (vertical leakage current) from the impurity diffusion layer to the substrate is disadvantageously increased due to crystal defects resulting from an ion implantation step for forming the source/drain region.
Japanese Patent Laying-Open No. 10-41407 (1998) proposes a technique of solving the problem of the crystal defects resulting from ion implantation. In a method of manufacturing a semiconductor device proposed in this gazette, ion implantation is selectively performed on a prescribed region of a semiconductor substrate, thereby forming an impurity region. A heat treatment (pre-annealing) is performed under a prescribed temperature for a constant time, thereby prompting recovery from crystal defects resulting from the aforementioned ion implantation in the impurity region. Thereafter a high-temperature short-time heat treatment (RTA: rapid thermal annealing) is performed thereby activating the impurity region and recovering from lattice defects resulting from the ion implantation. A surface part of the impurity region is denatured to a compound layer with a prescribed metal.
In this proposed prior art, pre-annealing is performed for prompting recovery from the crystal defects resulting from the ion implantation as a pre-step for the high-temperature heat treatment of RTA. However, the subsequent RTA is performed at a high temperature exceeding 1000° C., to cause new crystal defects resulting not from the ion implantation but from thermal lattice strain (stress strain). Thus, a vertical leakage current from the impurity region to the substrate is disadvantageously increased due to the crystal defects resulting from the RTA.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of manufacturing a semiconductor device capable of effectively preventing increase of a leakage current resulting from a high-temperature heat treatment.
Another object of the present invention is to provide a method of manufacturing a semiconductor device capable of readily recovering from crystal defects resulting from a high-temperature heat treatment.
A method of manufacturing a semiconductor device according to an aspect of the present invention comprises steps of forming an impurity region on the main surface of a semiconductor substrate, performing a high-temperature heat treatment for activating the impurity region, and performing a low-temperature heat treatment after performing the high-temperature heat treatment. In the present invention, the term “semiconductor substrate” indicates a wide concept including not only a general semiconductor substrate but also a semiconductor thin film etc. In the method of manufacturing a semiconductor device according to this aspect, it is possible to recover from crystal defects resulting from the high-temperature heat treatment by the low-temperature heat treatment.
A method of manufacturing a semiconductor device according to another aspect of the present invention comprises steps of forming an impurity region by selectively ion-implanting an impurity into the main surface of a semiconductor substrate, activating the impurity region by performing a high-temperature heat treatment, and recovering from crystal defects resulting from the high-temperature heat treatment by performing a low-temperature heat treatment after performing the high-temperature heat treatment. In the method of manufacturing a semiconductor device according to this aspect, it is possible to recover from crystal defects resulting from the ion implantation by the high-temperature heat treatment simultaneously with activation of the impurity. Further, it is possible to recover from crystal defects resulting from the high-temperature heat treatment by the low-temperature heat treatment.
The method of manufacturing a semiconductor device according to this aspect may further comprise a step of denaturing a surface part of the impurity region to a compound layer with a metal film. When forming such a compound layer, wiring resistance of the impurity region can be reduced. In this case, the step of denaturing the surface part to the compound layer preferably includes a step of forming a metal film on the impurity region and thereafter performing a heat treatment thereby denaturing the surface part of the impurity region to the compound layer with the metal film, and the temperature for the heat treatment for denaturing the surface part to the compound layer is preferably not in excess of the temperature for the high-temperature heat treatment. Thus, the crystal defects from which the semiconductor device is recovered by the low-temperature heat treatment are not caused again.
In the aforementioned case, the heat treatment for denaturing the surface part to the compound layer preferably includes a first heat treatment for forming the compound layer and a second heat treatment for reducing the resistance of the formed compound layer, and the temperature for the first and second heat treatments is preferably not in excess of the temperature for the high-temperature heat treatment. Thus, the crystal defects from which the semiconductor device is recovered by the low-temperature heat treatment are not caused again.
In the method of manufacturing a semiconductor device according to this aspect, further, it is preferable to recover from crystal defects resulting from the ion implantation in addition to activation of the impurity by the high-temperature
Ibara Yoshikazu
Inoue Yasunori
Nishida Atsuhiro
Sasada Kazuhiro
Tanimoto Shin-ichi
Armstrong Westerman Hattori McLeland & Naughton LLP
Bowers Charles
Pert Evan
Sanyo Electric Co,. Ltd.
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