Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-10-23
2003-06-10
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C438S152000, C438S166000, C438S466000
Reexamination Certificate
active
06576502
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to method for fabricating a thin film transistor and, more particularly, to method for forming offset/LDD structure in a thin film transistor.
2. Description of Related Art
Generally, as a thin film transistor can contain a CMOS, it has been widely used as a pixel On/Off switching element in a flat display such as an active matrix liquid crystal display. Such a thin film transistor should be designed having a voltage-resistance and a high On/Off current ratio.
The thin film transistor can be classified into two types: amorphous silicon transistors and poly silicon transistors. Although the poly silicon transistor is superior to the amorphous silicon transistor with regard to the electron moving rate and reliability, since a layer of the poly silicon transistor must be formed in a high temperature environment, the amorphous silicon transistor has been more widely used.
However, in recent years, as the layer of the poly silicon transistor can be formed in a low temperature environment using a system such as an eximer laser apparatus, greater use and development of the poly silicon transistor have taken place.
The poly silicon transistor is generally made by depositing amorphous silicon on a substrate, then by growing the amorphous silicon as the poly silicon by radiating eximer laser on the amorphous silicon. The poly silicon thin film transistor appears high current quality when it is turned on. However, since the poly silicon has a typical trap level at various portions, a large amount of current leakage is generated in a state where the transistor is turned off.
To solve the above problem, an offset region which is not doped with ions is formed between source and drain electrodes to interrupt the current leakage. Furthermore, a lightly doped drain (LDD) region is additionally formed to stabilize the offset region.
In conventional methods, the offset and LDD regions are formed through photolithography processes, which is complicated. However, a technology for forming the offset region without using a photolithography process has been developed.
That is, after densely doped source and drain contact regions are first formed, a gate electrode is anodized so that a section area thereof is eroded by an anodizing layer, thereby naturally forming the offset region within an active layer.
However, in this technology, it is limited to reduce an area of the gate electrode using the anodizing process. Furthermore, since a thickness of the gate electrode is reduced by as much as a thickness of the anodizing layer, the flow of current is deteriorated. In addition, as the anodizing layer is grown, a short circuit may occur between the source and drain electrodes.
In another method, the offset region is formed by wet-etching a sidewall of a gate electrode, which is protected by a photoresist layer. However, since the photoresist layer is hardened during a process for doping ions, it is difficult to eliminate the photoresist layer after the offset region forming process. In addition, if there is not accuracy in the alignment, it is difficult to obtain a desired offset region.
SUMMARY OF THE INVENTION
Therefore, the present invention has been made in an effort to solve the above-described problems of the conventional technologies.
It is an object of the present invention to provide a method of making a thin film transistor in which offset and LDD regions can be easily formed through an electrochemical polymerizing process.
To achieve the above and other objects, the present invention provides a method of forming a polymer layer used in forming an LDD structure of a thin film transistor, comprising: preparing a substrate on which an active layer, an insulating layer covering the active layer, and a gate electrode are formed in this order, dipping the substrate into electrolyte containing monomer; and generating an electric field by using an electric power supplier having a first end coupled to the gate electrode and a second end coupled to a metal electrode so that a polymer is formed enclosing the gate electrode at a predetermined thickness.
Preferably, the metal electrode includes a common electrode formed on the substrate and is made of a material or alloy selected from the group consisting of Cr, Ni, Ag, Au, Zn, Sn, Cu, Fe, Al, Pt, V, and C.
The monomer is selected from vinyl monomer and alkyl monomer. Preferably, the monomer is dissolved in a solvent and the solvent is selected from the group consisting of CH
2
Cl
2
, THF, CH
3
CN, DMF, DMSO, acetone, and water.
According to another aspect, the present invention provides a method of forming an offset/LDD structure of a thin film transistor, comprising: the steps of forming an active layer on a substrate, depositing an insulating layer on the substrate while covering the active layer, patterning a gate electrode on the insulating layer, forming a polymer layer by electrochemical polymerizing process such that the polymer layer encloses the gate electrode in a predetermined thickness, densely doping ions into the active layer using the polymer layer, removing the polymer layer.
The method may further comprise light doping ions into the active layer using the gate electrode as a mask before the forming a polymer layer or after the removing the polymer layer.
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patent: 9-27620 (1997-01-01), None
S. Wolf and Tauber, Silicon Processing for the VLSI Era, Lattice Press, vol. I—Process Technology, p. 416.
Isaac Stanetta
Niebling John F.
Samsung SDI & Co., Ltd.
Staas & Halsey , LLP
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