Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
2003-07-18
2004-06-08
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C438S221000, C438S246000, C438S248000, C438S296000, C438S359000, C438S424000, C438S433000, C438S440000, C438S438000, C438S444000, C438S449000, C438S524000, C438S526000, C438S529000, C438S700000, C438S701000
Reexamination Certificate
active
06746936
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming an isolation film for semiconductor devices, and more particularly, to a method for forming an isolation film for semiconductor devices, which prevents the formation of an edge moat.
2. Description of the Prior Art
With the advancement of semiconductor technology, the high speed and high integration level of semiconductor devices are rapidly increased, and at the same time, requirements for a fine pattern are gradually increased. These requirements are also applied to an isolation region, which occupies a relatively large area in a semiconductor substrate.
Currently, as an isolation film providing the isolation between semiconductor devices, there is generally used a LOCOS oxide film. This LOCOS isolation film is formed by local oxidation of silicon (LOCOS).
However, the LOCOS isolation film is disadvantageous in that a bird's beak is formed at the edge of the isolation film such that the area of the isolation film is increased and leakage current is induced.
Thus, in an attempt to solve the problem occurring in the LOCOS isolation film, there was proposed a method wherein an isolation film having reduced width and excellent isolation characteristics is formed using shallow trench isolation (STI).
FIG. 1
is a cross-sectional view illustrating a method for forming an isolation film for semiconductor devices according to a general STI technology. As shown in
FIG. 1
, a pad oxide film and a pad nitride film are formed on a semiconductor substrate and patterned to expose a portion of the substrate, which corresponds to a field region. Then, the exposed portion of the substrate is etched to a given depth to form a trench
17
. Next, the resulting substrate is subjected to sacrificial sidewall oxidation and liner oxidation, after which a high-density plasma oxide film as a field oxide film is formed on the substrate in such a manner as to fill the trench. Thereafter, the resulting substrate is subjected to chemical mechanical polishing (CMP) to complete the formation of a field oxide film
20
filling the trench, and then the pad nitride film is removed.
Then, the surface of the substrate is cleaned with a cleaning solution containing HF, HF/H
2
O, buffer oxide etchant (BOE) or the like, before deposition of a gate oxide film.
In other words, since the deposition of the gate oxide film is very critical to the characteristics of semiconductor transistors, the remaining foreign substances are removed with HF or a mixture of HF and other substances, before deposition of the gate oxide film.
However, during this cleaning process, an edge moat can be formed. If this edge moat occurs, sub-threshold current (Hump) and inverse narrow width effect (INWE) will occur to cause the abnormal operation of semiconductor devices.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and an object of the present invention is to provide a method for forming an isolation film for semiconductor devices, which can maximize the corner rounding of a trench and improve device characteristics, such as Hump and INWE.
To achieve the above object, the present invention provides a method for forming an isolation film for semiconductor devices, which comprises the steps of: successively forming a first oxide film and a nitride film on a semiconductor substrate; patterning the nitride film and the first oxide film to expose a portion of the semiconductor substrate, which corresponds to an isolation region; implanting impurity ions into the exposed portion of the semiconductor substrate to form an impurity ion-implanted layer; forming a spacer at the sidewall of the patterned nitride film, and at the same time, etching the ion-implanted layer using the spacer as a mask; etching a portion of the semiconductor substrate exposed by the etching of the ion-implanted layer, using the spacer as a mask, thereby forming a trench; removing the spacer; annealing the trench; forming a second oxide film at the inner wall of the trench; depositing a polarizing oxide film on the entire surface of the resulting substrate in such a manner as to gap fill the trench; subjecting the polarizing oxide film to chemical mechanical polishing (CMP) using the nitride film as a polishing stopper film, thereby polarizing the polarizing oxide film; and removing the nitride and first nitride films remaining after the polarizing step.
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Hynix / Semiconductor Inc.
Isaac Stanetta
Ladas & Parry
Niebling John F.
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