Method for forming interconnection of semiconductor device

Details Method for forming interconnection of semiconductor device Method for forming interconnection of semiconductor device

1996-09-13

1998-09-01

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438637, 438700, 438638, H01L 21441, H01L 21475

Patent

active

058010998

ABSTRACT:
A method of forming an interconnection for a semiconductor device includes the steps of: forming a lower conductive line on a semiconductor substrate and forming a first insulating layer on the semiconductor substrate and the lower conductive line; patterning the first insulating layer to form a first insulating layer pattern which is narrower than the lower conductive line on the lower conductive line; forming a second insulating layer on an overall surface of the substrate and on the first insulating layer pattern, to planarize a surface of the second insulating layer; patterning the second insulating layer to expose a surface of the first insulating layer pattern and to form a first trench wider than the first insulating layer pattern on an upper portion of the first insulating pattern; removing the first insulating layer pattern, to thereby form a second trench at a lower portion of the first trench; and filling the first and second trenches with conductive material, to thereby form an upper conductive line.

REFERENCES:
patent: 5296410 (1994-03-01), Yang
patent: 5328553 (1994-07-01), Poon
patent: 5382545 (1995-01-01), Hong
patent: 5461004 (1995-10-01), Kim
patent: 5705430 (1998-01-01), Avanzino et al.
patent: 5710061 (1998-01-01), Cleeves

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