Method for forming interconnection in semiconductor pattern devi

Details Method for forming interconnection in semiconductor pattern devi Method for forming interconnection in semiconductor pattern devi

1997-01-03

1998-06-16

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438633, 438636, 438665, 438690, 438692, H01L 214763

Patent

active

057670137

ABSTRACT:
A method for forming an interconnection pattern in a semiconductor device for reducing metallic reflection, includes the steps of forming a conductive layer on a substrate, polishing the conductive layer to form a rugged surface on the conductive layer, and selectively removing the polished conductive layer to form the interconnection pattern.

REFERENCES:
patent: 5124780 (1992-06-01), Sandhu et al.
patent: 5219787 (1993-06-01), Carey et al.
patent: 5461007 (1995-10-01), Kobayashi
patent: 5534462 (1996-07-01), Fiordalice et al.
patent: 5563096 (1996-10-01), Nasr
patent: 5607718 (1997-03-01), Sasaki et al.
patent: 5639692 (1997-06-01), Teong

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