Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Optimization
Reexamination Certificate
2011-04-05
2011-04-05
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Optimization
C716S139000
Reexamination Certificate
active
07921400
ABSTRACT:
A cell library is disclosed that includes soft error resistant logic cells. The soft error resistant logic cells can be used along with memory cells and conventional logic cells to form integrated circuit designs having increased soft error resistance. A method for forming an integrated circuit device is disclosed in which a first integrated circuit design is formed using conventional logic cells. An iterative process is then performed in which some of the conventional logic cells are replaced with high soft error resistant logic cells to obtain a soft error resistant design. Each soft error resistant logic cell that replaces a corresponding conventional logic cell will have the same cell size as the cell that is replaced, producing a soft error resistant design that does not take up additional surface area on the semiconductor substrate.
REFERENCES:
patent: 4641165 (1987-02-01), Lizuka et al.
patent: 4805147 (1989-02-01), Yamanake et al.
patent: 4864539 (1989-09-01), Chaung et al.
patent: 5128745 (1992-07-01), Takasu et al.
patent: 5324982 (1994-06-01), Nakazato et al.
patent: 5572460 (1996-11-01), Lien
patent: 5644155 (1997-07-01), Lien
patent: 5681769 (1997-10-01), Lien
patent: 5691652 (1997-11-01), Miller
patent: 5710070 (1998-01-01), Chan
patent: 5825686 (1998-10-01), Schmitt-Landsiedl et al.
patent: 6472715 (2002-10-01), Liu et al.
patent: 6580130 (2003-06-01), Schoellkopf et al.
patent: 6621146 (2003-09-01), Bowman
patent: 6649456 (2003-11-01), Liaw
patent: 6703858 (2004-03-01), Knowles
patent: 6754093 (2004-06-01), Lien
patent: 2002/0195661 (2002-12-01), Ueda
patent: 2004/0100320 (2004-05-01), Nelson et al.
patent: 2004/0230935 (2004-11-01), Samudrala et al.
patent: 2004/0259295 (2004-12-01), Tomiye et al.
patent: 2005/0083726 (2005-04-01), Auclair et al.
patent: 2005/0098835 (2005-05-01), Ushiroda et al.
patent: 2005/0127419 (2005-06-01), Hashimoto
patent: 2005/0141265 (2005-06-01), Yokoyama
patent: 2005/0158951 (2005-07-01), Jang
patent: 2006/0063324 (2006-03-01), Park et al.
patent: 2006/0086989 (2006-04-01), Lee et al.
patent: 2006/0134854 (2006-06-01), Park et al.
patent: 2007/0006109 (2007-01-01), Bartling et al.
The Design of Radiation-Hardened ICs for Space: A Compendium of Approaches, S. Kern and B.D. Shafer, Proceedings of the IEEE, vol. 76, No. 11, pp. 1470-1509, 1994.
A Proposed New Structure for SEU Immunity in SRAM Employing Drain Resistance, A. Ochoa, Jr et al, IEEE electron device letter No. 11, pp. 537-539, 1987.
Experimental Determination of Time Constants for Ion-Induced Transients in Static Memories, H. Weaver et al, IEEE transaction on electron devices vol. 35, No. 7, pp. 1116-1119, 1988.
A New Soft Error Immune Static Memory Cell, M. Minami et al, 1988 Symposium on VLSI Technology, pp. 57-58, 1988.
Soft Error Protection Using Asymmetric Response Latches, H. Weaver, IEEE transcation on electron devices vol. 38, No. 6, pp. 1555-1557, 1991.
Robust System Design with Built-In Soft Error Resilence, S. Mitra et al., IEEE Computer Society Publication, pp. 43-52, Feb. 2005.
Ohsono; A Radiation-Hardened CMOS 177k Gate Array Having Libraries Compatible With Commerical Ones; 1994; National Space Development Agency of Japan; pp. 37-40.
Lee Shih-Ked
Lien Chuen-Der
Chiang Jack
Glass Kenneth
Glass & Associates
Integrated Device Technology Inc.
Memula Suresh
LandOfFree
Method for forming integrated circuit device using cell... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming integrated circuit device using cell..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming integrated circuit device using cell... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2732104