Method for forming integrated circuit capacitor and memory

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

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438 3, 438240, 438669, 438712, H01L 2120, H01L 2100, H01L 218242, H01L 2144, H01L 21302

Patent

active

061534900

ABSTRACT:
A method for etching a feature in a platinum layer 834 overlying a second material 818 without substantially etching the second material. The method includes the the steps of: forming an adhesion-promoting layer 824 between the platinum layer and the second material; forming a hardmask layer 829 over the platinum layer; patterning and etching the hardmask layer in accordance with desired dimensions of the feature; and etching portions of the platinum layer not covered by the hardmask layer 832, the etching stopping on the adhesion-promoting layer. In further embodiments the adhesion-promoting and hardmask layers are Ti--Al--N including at least 1% of aluminum.

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