Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2001-08-01
2003-11-04
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S787000, C438S788000, C438S791000
Reexamination Certificate
active
06642156
ABSTRACT:
BACKGROUND
The present invention relates generally to semiconductor processing and, more particularly, to improved techniques for fabricating gate dielectrics.
As integrated circuits have become smaller and more densely packed, so have the dielectric layers of devices such as field effect transistors and capacitors. With the arrival of ULSI (Ultra Large Scale Integrated circuit) technology and gate dielectrics of less than 15 angstroms (Å) in thickness, the use of silicon dioxide (SiO
2
) as a traditional gate dielectric material becomes problematic.
In larger devices (e.g., where the gate oxide thickness is 40 Å or more), leakage currents from a polysilicon gate electrode, through the gate oxide and into the device channel, are only on the order of about 1×10
−12
A/cm
2
. However, as the thickness of an SiO
2
gate dielectric is decreased below 20 Å, the leakage currents approach values of about 1 A/cm
2
. This magnitude of leakage current, caused by direct tunneling of electrons from the polysilicon gate electrode through the gate oxide, results in prohibitive power consumption of the transistor(s) in the off-state, as well as device reliability concerns over an extended period of time.
Another problem with ultrathin SiO
2
gate dielectrics relates to the doping of the polysilicon gate electrodes with a dopant material, such as boron. Such doping is typically used to combat channel depletion effects which cause voltage threshold (V
t
) shifts and higher threshold voltages. With an ultrathin SiO
2
gate dielectric, however, the boron dopant atoms can easily penetrate the SiO
2
layer and thereby cause large V
t
shifts and reliability problems themselves.
Accordingly, the nitrogen doping of gate dielectrics has become a preferred technique of semiconductor chip manufacturers. For gate dielectrics having a thickness range of about 15 Å to 20 Å, silicon oxynitride (SiO
x
N
y
) layers have replaced SiO
2
layers as the choice of gate dielectric material. The beneficial effects of nitrogen incorporation into the dielectric are generally dependent upon the concentration of the doping and the distribution of the doping profile relative to both the Si/SiO
2
interface and the polysilicon gate/SiO
2
interface. If properly carried out, the nitrogen doping reduces leakage current and boron penetration, while minimizing or negating the impact on V
t
and channel electron mobility.
Present nitridation techniques, however, do have certain drawbacks associated therewith. For example, a rapid thermal annealing process (such as in the presence of N
2
O or NO gas) by itself may not result in a sufficiently high nitrogen content so as to faciliate the desired reduction in leakage current. In the case of a plasma process, such as remote plasma nitridation (RPN), the possibility exists that the ionized plasma species will cause damage to active devices formed on the semiconductor wafer.
BRIEF SUMMARY
The above discussed and other drawbacks and deficiencies of the prior art are overcome or alleviated by a method for forming an ultra thin gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial nitride layer upon a substrate and then re-oxidizing the initial nitride layer, thereby forming an oxynitride layer. The oxynitride layer has a nitrogen concentration therein of at least 1.0×10
15
atoms/cm
2
and has a thickness which may be controlled within a sub 10 Å range.
In a preferred embodiment, forming the initial nitride layer includes rapidly heating the substrate in the presence of an ammonia (NH
3
) gas at temperature of about 650° C. to about 1000° C., and at a pressure of about 1 Torr to about 760 Torr. Re-oxidizing the initial nitride layer includes rapidly heating the initial nitride layer in the presence of a nitric oxide (NO) gas at temperature of about 650° C. to about 1000° C., and at a pressure of about 1 Torr to about 760 Torr. The oxynitride layer preferably has a nitrogen atom concentration of about 1.0×10
15
atoms/cm
2
to about 6.0×10
15
atoms/cm
2
.
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Kiran Kumar, Anthony Chou, Chuan Lin, Prasenjit Choudhury, and Jack C. Lee; “Optimization of sub 3 nm gate dielectrics grown by rapid thermal oxidation in a nitric oxide ambient,”American Institute of Physics, vol. 70; Jan. 20, 1997; pp. 384-386.
Ajmera Atul C.
D'Emic Christopher P.
Gousev Evgeni
Cantor & Colburn LLP
International Business Machines - Corporation
Pepper Margaret
Rocchegiani Renzo N.
Smith Matthew
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