Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-10-06
2003-09-30
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C345S090000, C345S206000, C345S668000, C355S001000, C355S040000, C355S046000, C355S052000, C355S054000, C355S071000, C355S077000, C355S084000, C355S132000, C355S133000
Reexamination Certificate
active
06629292
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to methods of forming graphical images which are intended to be eventually perceptible to the human eye with or without the aid of imaging enhancement means and more particularly to methods of forming images in semiconductor devices which are easy to fabricate and provide a good likeness of the image being portrayed.
2. Description of Related Art
Techniques for forming graphical images on the surface of semiconductor devices have been used as long as semiconductor devices have been fabricated. As part of the camaraderie among circuit designers, most have found ways to leave “their mark” on the surface of semiconductor devices, usually in one or more of the layers of the material having sufficient contrast to be clearly visible on a completed device. Such “art work” usually depicts some form of logo representing a company or designer's code name for the product. For example, the logo for a product called “Eagle” might include a crude image of an eagle formed within the limits of the specific processing technology from which the device is manufactured.
For the most part, such images have been either relatively crude and/or are subject to “ground rule” violations established by the process designers. Creating images in semiconductor devices is accomplished by making patterns in existing metallurgy in which the metal and it's contrasting adjacent insulators are shaped, similar to creating images in a stencil or in creating designs for carving pumpkins. That is, since the pattern is formed by the opaque (or clear) segments of a mask in a binary fashion all of the opaque portions of a design must remain attached to each other, otherwise some of the pieces of patterned metallurgy will be lost by falling off of the supporting substrate and causing contamination or reliability problems with the devices.
Because of the difficulty in creating images in the metallurgy of semiconductor devices, resulting images heretofore have been of the simplest binary design.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a capability for forming gray level images in the surface of semiconductor devices by taking advantage of certain features of the recently implemented practice of interconnect metallurgy in which high degree of planarization between metal layers and corresponding interlevel metal dielectric layers is characteristic.
It is another object of this invention to provide an efficient method for converting any image into a two dimensional pattern of contrasting materials which in turn is capable of rendering a visually perceptible image with a high degree of resolution and detail.
It is a further object of this invention to provide a new and useful media for storing and recovering gray level black and white as well as color images which has a long lifetime and is considerably space conserving.
These and other object of the invention will become apparent to those skilled in the art when considered in view of the following more detailed description and the accompanying drawings.
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Corson Phillip L.
Holsopple Gary R.
Parry Jason M.
Pokorny William F.
Canale Anthony J.
Chadurjian Mark
International Business Machines - Corporation
Liu Andrea
Smith Matthew
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