Method for forming gate terminal

Details Method for forming gate terminal Method for forming gate terminal

1999-05-17

2000-10-24

Utech, Benjamin L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438586, 438592, 438664, 438719, H01L 213205, H01L 214763

Patent

active

061366757

ABSTRACT:
A method of forming the gate terminal of a device. The method includes forming spacers on top of the gate polysilicon layer and near the side edges thereof, and then etching the gate polysilicon layer to form a groove using the spacers as a mask. Hence, the exposed surface area of the gate polysilicon layer is increased. Finally, a metal silicide layer is formed over the gate polysilicon layer, producing a low resistance gate.

REFERENCES:
patent: 5686331 (1997-11-01), Song
patent: 5753557 (1998-05-01), Tseng
patent: 5801424 (1998-09-01), Luich
patent: 5994193 (1999-11-01), Gardner et al.
patent: 6015747 (2000-01-01), Lopatin et al.

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