Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-06-15
2008-11-04
Estrada, Michelle (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S588000, C438S595000, C257SE29159, C257SE21636, C257SE21638
Reexamination Certificate
active
07446027
ABSTRACT:
A method for forming a gate structure with a pulled-back conductive layer and the use of the method are provided. The method conducts a local, not global, pull-back process on the conductive layer of the gate structure at the position intended for contact window formation, wherein the pull-back process is conducted after rapid thermal oxidation to prevent CBCB short, CB open and/or CBGC short.
REFERENCES:
patent: 5545578 (1996-08-01), Park et al.
patent: 5989987 (1999-11-01), Kuo
patent: 6486067 (2002-11-01), Shen et al.
patent: 6762101 (2004-07-01), Chan et al.
patent: 6855610 (2005-02-01), Tung et al.
Colandreo, Esq. Brian J
Estrada Michelle
Holland & Knight LLP
Promos Technologies Inc.
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