Method for forming gate in semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S259000, C438S631000, C438S595000, C438S700000

Reexamination Certificate

active

10879777

ABSTRACT:
Disclosed is a method for forming a gate in a semiconductor device. The method includes the steps of: sequentially forming a gate insulation layer and an inter-layer insulation layer on a substrate; patterning the inter-layer insulation layer into a predetermined configuration, thereby forming a patterned inter-layer insulation layer; forming a nitride layer on the patterned inter-layer insulation layer; simultaneously etching the nitride layer and the substrate, thereby obtaining a spacer on sidewalls of the patterned inter-layer insulation layer and a trench having a predetermined depth in the substrate; forming a conductive layer on the trench; and planarizing the conductive layer, thereby forming the gate.

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ASC9: 90 nm CMOS Process Technology, 4 pages.
Intel Technology Journal, vol. 8, iss. 2, May 10, 2004, 3 pages.

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