Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
1999-10-22
2001-07-31
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C438S440000, C438S443000, C438S449000, C438S450000, C438S451000
Reexamination Certificate
active
06268266
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method for forming a semiconductor isolation device, and more particularly to a method for forming an enhanced field oxide region of a low voltage device in a high voltage process.
2. Description of the Prior Art
As the semiconductor device has been progressively densely integrated, the element structure has been minimized. On the other hand, the on-chip system, which involves the combination of minimized semiconductor elements and systems for operating the semiconductor elements built on one chip, has been popular. In the case of on-chip semiconductor devices, low voltage elements with low voltage and high voltage elements with high voltage are formed on the same semiconductor substrate to accomplish minimization.
Isolation is provided in a semiconductor between transistors on a semiconductor chip to prevent unwanted electrical connections therebetween.
The conventional isolation device is FOX (field oxide) whose formulation is forming a silicon nitride layer defined on active areas and forming a FOX region between the active areas using a suitable thermal oxidation method.
FIGS. 1A
to
1
C are schematic representations of structures at various stages during the formulation of a low voltage device and a high voltage device in a chip using conventional, prior art techniques. One portion denotes a low voltage device while the other portion denotes a high voltage device in all of the figures. First, a substrate
100
is provided with wells
110
,
112
formed therein. Wells
110
,
112
are formed in the substrate
100
by a suitable implantation method. A silicon nitride layer
140
is then formed on the substrate
100
and is defined on the active areas. Then, field oxide regions
120
are formed using a conventional thermal oxidation method between the active areas. It is obvious that the silicon nitride layer
140
is the mask of forming field oxide region
120
.
Referring to
FIG. 1B
, the silicon nitride layer
140
is removed both on the low voltage device and the high voltage device. Then, a thick gate oxide layer
122
is formed on the active areas using a suitable thermal oxidation method. The thickness of this oxide layer
122
is provided for high voltage device while the gate oxide layer of the low voltage device is formed by etching. Then, the gate oxide layer of the low voltage device will be etched to a thin gate oxide layer
124
(depending on the voltage level) while all high voltage devices are masked by a photoresist layer
150
, as shown in FIG.
1
C. However, the field oxide regions
120
in low voltage device will be etched in-situ to cause the field oxide region loss when etching the gate oxide
122
. This will decrease the isolation in low voltage device.
A direct way of overcoming this problem is to increase the thickness of the field oxide region when forming the gate oxide layer
122
. However, there is no way to grow an oxide layer on the field oxide region. Another method to solve this issue is to increase the thickness of the field oxide region. Nevertheless, the increased thickness of the field oxide region will cause the active area due to the bird's beak to increase the design rule of one chip.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming an enhanced field oxide region of a low voltage device in a high voltage process that substantially prevents the FOX region from being etched when etching the gate oxide layer. This method essentially utilizes two key steps. These steps include nitrogen implantation before removing silicon nitride first and then transferring silicon nitride to silicon oxynitride on the field oxide region by the temperature of forming the gate oxide layer. Because the etching rate of silicon oxynitride is lower than that for silicon oxide, there is no field oxide loss when etching a gate oxide of a low voltage device. This method will possess the pretty isolation of a field oxide under the same design rule.
It is another object of this invention that the increased number of steps of this process is compatible with the formation of an enhanced FOX region.
In one embodiment, a method for forming an enhanced field oxide region of low voltage device in a high voltage process is disclosed. The method comprises providing a substrate and then forming at least one well in the substrate. Then, a field oxide region is formed on the substrate between the well. As a key step, nitrogen is tilt implanted into the field oxide region, and the silicon nitride layer is then removed. Gate oxide layer on the well and a silicon oxynitride layer on the field oxide regions are formed in-situ by thermal oxidation method. Then, a mask layer is formed on the high voltage device, and the gate oxide layer of the low voltage device is etched.
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Chen Fei-Hung
Chen Wei-Chung
Hwang Ching-Chun
Tsai Meng-Jin
Gurley Lynne A.
Niebling John F.
United Microelectronics Corp.
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