Method for forming electrically conductive layers on chip carrie

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

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430313, 430318, 427 97, 438667, 216 18, G03F 700

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active

059855215

ABSTRACT:
A method for fabricating a chip carrier, such as a printed circuit board, which includes at least one through hole or via hole, is disclosed. In accordance with this method, an electrically conductive layer is formed on at least one of the major surfaces of the corresponding chip carrier substrate, as well as for the surface of the through hole or via hole. Significantly, the electrically conductive layer on the at least one major surface is relatively thin, which permits the formation of a relatively high density of circuit lines in this layer. On the other hand, the electrically conductive layer on the surface of the through hole or via hole is relatively thick, which prevents the formation of defects in this layer.

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patent: 4770900 (1988-09-01), Seibel
patent: 4983252 (1991-01-01), Masui et al.
patent: 5236810 (1993-08-01), Kondo et al.
patent: 5427895 (1995-06-01), Magnuson et al.
patent: 5504992 (1996-04-01), Fukutomi et al.

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