Method for forming dual gate electrodes using damascene gate...

Details Method for forming dual gate electrodes using damascene gate... Method for forming dual gate electrodes using damascene gate...

2006-04-11

2006-04-11

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having schottky gate

C438S692000

Reexamination Certificate

active

07026203

ABSTRACT:
A method for forming dual gate electrodes using a damascene gate process is disclosed. A disclosed method comprises: growing a first gate oxide layer on a semiconductor substrate; performing a thermal treatment for a first gate oxide layer; removing a predetermined part of the first gate oxide layer until the top surface of the semiconductor substrate is exposed; growing a second gate oxide layer as a thin oxide layer on the exposed semiconductor substrate, thereby making the first gate oxide layer as a thick oxide layer; depositing polysilicon on the entire surface of the semiconductor substrate and forming dummy gates through a photolithography and an etching processes; forming sidewall spacers on the lateral faces of the dummy gates; forming source and drain regions in the substrate under both sides of the dummy gates; removing the dummy gates and the second gate oxide layer; forming an insulating layer where the second gate oxide layer is removed; performing a thermal treatment for the insulating layer; filling polysilicon for gate electrodes where the dummy gates were removed; and planarizing the resulting structure until the gate electrodes are exposed.

REFERENCES:
patent: 6043157 (2000-03-01), Gardner et al.
patent: 6087208 (2000-07-01), Krivokapic et al.
patent: 6514827 (2003-02-01), Kim et al.
patent: 6580137 (2003-06-01), Parke
patent: 6613621 (2003-09-01), Uh et al.
patent: 6861319 (2005-03-01), Hoshino et al.
patent: WO 02/19396 (2002-03-01), None

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