Method for forming dual damascene with improved etch profiles

Details Method for forming dual damascene with improved etch profiles Method for forming dual damascene with improved etch profiles

2007-11-06

2007-11-06

Smith, Zandra V. (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S622000, C438S623000, C438S624000, C438S634000, C257SE23001

Reexamination Certificate

active

11075777

ABSTRACT:
A method for forming a dual damascene with improved profiles including providing a semiconductor process wafer including a dielectric insulating layer and an overlying hardmask layer; forming an uppermost layer of amorphous carbon substantially conformally over the hardmask layer; forming a trench line opening through at least the thickness of the amorphous carbon layer; forming a dual damascene opening comprising forming the trench line opening overlying a via opening pattern through a thickness of the hardmask layer and partially through a thickness of the dielectric insulating layer; and, filling the dual damascene opening with metal.

REFERENCES:
patent: 6387798 (2002-05-01), Loke et al.
patent: 6440863 (2002-08-01), Tsai et al.
patent: 6927495 (2005-08-01), Arita et al.
patent: 2003/0119307 (2003-06-01), Bekiaris et al.
patent: 2005/0167839 (2005-08-01), Wetzel et al.
patent: 2005/0214694 (2005-09-01), Hong et al.

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