Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-06-22
2010-10-12
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S672000, C438S675000, C257SE21579
Reexamination Certificate
active
07811929
ABSTRACT:
A method for forming a dual damascene pattern includes preparing a multi-functional hard mask composition including a silicon resin as a base resin; forming a deposition structure including a self-arrangement contact insulation film, a first dielectric film, an etching barrier film, and a second dielectric film over a hardwiring layer; etching the deposition structure to expose the hardwiring layer, thereby forming a via hole; forming the multi-functional hard mask composition on the second dielectric film and in the via hole to form a multi-functional hard mask film; and etching the resulting structure to expose a part of the first dielectric film, thereby forming a trench having a width wider than that of the via hole; and removing the multi-functional hard mask film.
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Heo Jung Gun
Lee Ki Lyoung
Hynix / Semiconductor Inc.
IP & T Law Firm PLC
Taylor Earl N
Vu David
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