Method for forming dual damascene pattern

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Reexamination Certificate

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11026881

ABSTRACT:
Disclosed is a method for forming a dual damascene pattern. The method includes the steps of forming a lower conductive structure on a lower insulating layer, forming a first protective film, a first insulating film, a second insulating film, a third insulating film, and a second protective film, sequentially, on the lower insulating layer and the lower conductive structure, forming a via hole up to a predetermined depth of the second insulating film through the second protective film and the third insulating film, forming a trench up to the predetermined depth of the second insulating film through the second protective film and the third insulating film, and simultaneously, extending the via hole up to a point at which the first protective film is exposed, and selectively etching the first protective film exposed through the via hole to expose the lower conductive pattern and form the dual damascene pattern.

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patent: 2002/0034874 (2002-03-01), Hidemitsu
patent: 1302981 (2003-04-01), None

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