Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-09-10
2003-05-06
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S633000, C438S672000
Reexamination Certificate
active
06559044
ABSTRACT:
DESCRIPTION
1. Field of the Invention
The invention pertains in general to a method for manufacturing a semiconductor device and, more particularly, to a method for forming contacts.
2. Background
Semiconductor manufacturing process generally includes a number of processing steps in which certain areas of a semiconductor substrate are masked while other areas are subjected to processing conditions such as etching and deposition. Efforts in the semiconductor industry have long focused on reducing the number of processing steps in a given manufacturing process while maintaining or improving upon the yield and quality of the products.
In a conventional CMOS process, a plurality of active devices, such as transistors and memory cells, are formed over the semiconductor substrate. One or more metal layers are formed over, and electrically insulated from, the active devices. Contacts, or vias, serve to electrically connect certain active regions of the active devices formed over the semiconductor substrate to one of the metal layers. For example, in a Dynamic Random Access Memory (DRAM) device, a bit line (may be a diffused region formed in the substrate) and a storage node (or gate) are electrically connected to active regions of a semiconductor substrate through self-aligned contact processes. Separate photolithographic processing steps are used to both form contact openings and expose the regions of the active devices. It is desirable to reduce the number of required processing steps associated with forming an integrated circuit. It is also desirable to improve upon current semiconductor processing techniques.
SUMMARY OF THE INVENTION
In accordance with the invention, there is provided a method for manufacturing a semiconductor device that includes providing at least two active devices over a substrate, each of the active devices includes a gate electrode provided over a gate oxide, a silicide formed over the gate electrode, a cap formed over the silicide, and a pair of spaced-apart diffused regions formed in the substrate. The method also includes depositing a first layer of dielectric material over the substrate and active devices, providing a first photoresist over the first layer of dielectric material, defining and patterning the first photoresist, etching the first layer of dielectric material unmasked by the first photoresist to form a first opening, wherein the first opening exposes a first silicide of a first active device, removing the first photoresist, depositing a second layer of dielectric material over the first layer of dielectric material and in the first opening, providing a mask over the second layer of dielectric material, providing a second photoresist over the mask, defining and patterning the second photoresist, and forming a second opening and a third opening, wherein the second opening is aligned with the first opening and exposes the first silicide of the first active device, and the third opening exposes one of the pair of the spaced-apart diffused regions of a second active device.
Also in accordance with the present invention, there is provided a method for forming contacts in a semiconductor device including a plurality of active devices over a depositing a first of dielectric devices formed over a substrate that includes depositing a first layer of dielectric material over the substrate and plurality of active devices, forming a first opening in the first layer of dielectric material, depositing a second layer of dielectric material over the first layer of dielectric material and in the first opening, providing a mask over the second layer of dielectric material, wherein the mask material is distinguishable over silicon oxides, and forming a second opening and a third opening in the second layer of dielectric material, wherein the second opening is aligned with the first opening and exposes a first silicide of a first active device, and the third opening exposes one of diffused regions of a second active device.
Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one embodiment of the invention and together with the description, serve to explain the principles of the invention.
REFERENCES:
patent: 5652180 (1997-07-01), Shinriki et al.
patent: 6211059 (2001-04-01), Inoue et al.
patent: 6245656 (2001-06-01), Chen et al.
patent: 6258708 (2001-07-01), Takahashi
patent: 6423627 (2002-07-01), Carter et al.
Chen Chin-Sheng
Chen Chun-Che
Lin Han-Chih
Yeh Fang-Yu
Chaudhari Chandra
Finengan, Henderson, Farabow, Garrett & Dunner, L.L.P.
ProMos Technologies Inc.
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