Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
1999-12-27
2001-04-03
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S533000, C438S595000, C438S624000, C438S738000
Reexamination Certificate
active
06211047
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a self-aligning contact of a semiconductor device, and more particularly, the present invention relates to a method for forming a contact of a semiconductor device, which allows the contact to be formed without degrading properties of the semiconductor device, using a self-aligning contact (SAC) as being necessarily required in manufacturing a highly integrated semiconductor device.
2. Description of the Related Art
In an existing memory device manufacturing technology, spacers are formed at gate side walls of a cell part and a peripheral circuit part using only one kind of material.
The spacer which is formed on the gate side wall of the peripheral circuit part is considered as an element which determines properties of a transistor, and the spacer which is formed on the gate side wall of the cell part is considered as an element which determines a contact area, that is, a contact process margin, when implementing an SAC process.
Accordingly, in order to secure a sufficient contact area, a size of the spacer must be reduced. However, in this case, a punch-through property of the transistor which is formed on the peripheral circuit part, is deteriorated.
While not shown in the drawings, hereinafter, a method for forming a contact of a semiconductor device according to the prior art will be described in detail.
First, a device isolation film is formed on an inactive region of a semiconductor substrate, and a gate stack structure is formed on an active region of the semiconductor substrate.
At this time, the gate stack structure refers to a stack structure of a gate oxide film, a conductor layer for a gate electrode, and a mask oxide film.
Then, a spacer oxide film having predetermined thickness is formed on a side wall of the gate stack structure.
Thereafter, an interlayer insulating film for flattening an entire upper surface of the resultant structure is formed.
After that, a photoresist film pattern is formed on the interlayer film by exposing and developing processes which use a contact mask.
Then, a self-aligning contact etching process is implemented by using the photoresist film pattern as a mask.
However, the method for forming the self-aligning contact of a semiconductor device according to the prior art, constructed as mentioned above, suffer from defects as described below.
In the method for forming the self-aligning contact of a semiconductor device, spacer oxide films are formed simultaneously on the cell and the peripheral parts so that they become thin thereby to reduce a channel length of the transistor of the peripheral circuit part.
Due to the above factor, a punch-through property of the transistor is deteriorated, whereby properties and reliability of the semiconductor device are degraded, and it is difficult to achieve a high integration of the semiconductor device.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been made in an effort to solve the problems occurring in the related art, and an objective of the present invention is to provide a method for forming a contact of a semiconductor device, by which a stack structure of a nitride film and an oxide film is formed on a side wall of a gate stack structure, thereby allowing a self-aligning contact process to be implemented without degrading properties of a cell part and a peripheral circuit part of the semiconductor device.
In accordance with one aspect, the present invention provides a method for forming a contact of a semiconductor device, comprising the steps of: forming a gate stack structure on cell and peripheral circuit parts of a semiconductor substrate; forming a stack structure of first and second spacer insulation films on an entire upper surface of the gate stack structure; forming a spacer in which the first spacer insulating film and the second spacer insulating film are stacked one upon the other, on a side wall of the gate stack structure, by anisotrophically etching portions of the stack structure of the first spacer insulation film and the second spacer insulation film of the peripheral circuit part, using a cell part mask which reveals the peripheral circuit part; forming an interlayer insulation film for flattening an entire upper surface of a resultant structure; and implementing a self-aligning contact process for revealing the cell part of the semiconductor substrate.
In accordance with another aspect, the present invention provides a method for forming a contact of a semiconductor device, comprising the steps of: forming a stack structure of a gate insulation film, a conductor layer for a gate electrode and a mask insulation film on a cell part and a peripheral circuit part of a semiconductor substrate; forming a gate stack structure by patterning the stack structure; forming a stack structure of first and second spacer insulation films on an entire upper surface of the gate stack structure; forming a spacer in which the first and second spacer insulation films are stacked one upon the other, on a side wall of the gate stack structure, by etching portions of the stack structure of the first spacer insulation film and the second spacer insulation film of the peripheral circuit part, using a cell part mask which reveals the peripheral circuit part; forming an interlayer insulation film for flattening an entire upper surface of a resultant structure; and implementing a self-aligning contact process by etching the interlayer insulation film, the second spacer insulation film and the first spacer insulation film, using a peripheral circuit part mask which reveals the cell part of the semiconductor substrate.
In accordance with another aspect, the present invention provides a method for forming a contact of a semiconductor device, comprising the steps of: forming a stack structure of a gate insulation film, a conductor layer for a gate electrode and a mask insulation film on a cell part and a peripheral circuit part of a semiconductor substrate; forming a gate stack structure by patterning the stack structure; forming a stack structure of a spacer nitride film by a LPCVD method and a spacer oxide film on an entire upper surface of the gate stack structure; forming a spacer in which the spacer nitride film and the spacer oxide film are stacked one upon the other, on a side wall of the gate stack structure, by etching portions of the stack structure of the spacer nitride film and the spacer oxide film of the peripheral circuit part, using a cell part mask which reveals the peripheral circuit part; forming an interlayer insulation film for flattening an entire upper surface of a resultant structure; and implementing a self-aligning contact process by etching the interlayer insulation film, the spacer nitride film and the spacer oxide film, using a peripheral circuit part mask which reveals the cell part of the semiconductor substrate.
REFERENCES:
patent: 5460993 (1995-10-01), Hsu et al.
patent: 5641698 (1997-06-01), Lin
patent: 5935875 (1999-08-01), Lee
patent: 5998249 (1999-12-01), Liaw et al.
patent: 6015730 (2000-01-01), Wang et al.
patent: 6121082 (2000-09-01), Linliu et al.
Lee Jung Hoon
Wi Bo Ryeong
Dang Trung
Hyundai Electronics Industries Co,. Ltd.
Jacobson Price Holman & Stern PLLC
Kebede Brook
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