Method for forming contact hole in highly integrated semiconduct

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156643, 437981, B23P 1500

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active

053686829

ABSTRACT:
A method for forming a contact hole in a semiconductor device, capable of reducing the dimension of the contact hole below the limit set by semiconductor fabrication equipment. The method includes the steps of preparing a semiconductor substrate formed at an upper surface thereof with a first wiring pattern, forming an interlayer insulating film over the entire surface of the semiconductor substrate, forming an selective etch film over the interlayer insulating film, forming an oxide layer over the selective etch film, the oxide layer having a very high etch selectivity to the selective etch film, forming a pseudo-contact hole in the oxide layer, the selective etch film being partially exposed through the pseudo-contact hole, deforming side walls of the pseudo-contact hole to have a semicircular shape such that each of the side walls has a protruded central portion, burring an selective etch material in an lower edge portion of the contact hole such that the side walls of the pseudo-contact hole have a linear shape, and removing the oxide layer and anisotropically etching the resulting structure so as to form a miniature contact hole having a bottom surface comprised of the wiring pattern and side walls comprised of both the interlayer insulating film and the selective etch film.

REFERENCES:
patent: 4654113 (1987-03-01), Tuchiya
patent: 5063176 (1991-11-01), Lee
patent: 5166088 (1992-11-01), Ueda
patent: 5174858 (1992-12-01), Yamamoto
patent: 5269880 (1993-12-01), Jolly
patent: 5275972 (1994-01-01), Ogawa
patent: 5279989 (1994-01-01), Kim

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