Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-10-02
2007-10-02
Wilczewski, M. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000
Reexamination Certificate
active
11024847
ABSTRACT:
A method for forming a contact hole for a dual damascene interconnection in a semiconductor device. A via hole is formed to expose an etch stop film on a lower metal film through an intermetal insulating film. The via hole is filled with a sacrificial film. A bottom antireflective coating film and a mask pattern are formed on the intermetal insulating film and the sacrificial film. An etching process is performed to form a trench to expose a portion of a surface of the intermetal insulating film and a top surface of the sacrificial film. A post etch treatment is performed to remove the sacrificial film, using the mask pattern as an etching mask. The exposed etch stop film is removed to expose a portion of a surface of the lower metal film. A passivation process is performed for the exposed surface of the lower metal film.
REFERENCES:
patent: 6924228 (2005-08-01), Kim et al.
patent: 2002/0182880 (2002-12-01), Zhu et al.
patent: 2005/0142832 (2005-06-01), Lee
patent: 2005/0142859 (2005-06-01), Lee
Dongbu Electronics Co. Ltd.
Lowe Hauptman & Ham & Berner, LLP
Perkins Pamela E
Wilczewski M.
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