Method for forming CMOS structure with void-free dielectric...

Details Method for forming CMOS structure with void-free dielectric... Method for forming CMOS structure with void-free dielectric...

2007-01-16

2007-01-16

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S634000, C257SE21580

Reexamination Certificate

active

10863533

ABSTRACT:
A process for forming a void-free dielectric layer is disclosed in which adjoining gate film stacks are formed on a semiconductor substrate. Each gate film stack includes a silicide layer and a hard mask that overlies the silicide layer. A first selective etch is performed so as to reduce the width of the hard mask on each of the gate film stacks, exposing portions of the top surface of the silicide layer. A second selective etch is then performed to reduce the width of the silicide layer. Spacers are then formed on opposite sides of each of the gate film stacks, and a dielectric film is formed that extends over the gate film stacks. By reducing the width of the hard mask layer and the silicide layer, gate film stacks are obtained that have reduced width near the top of each gate film stack, preventing voids from forming in the dielectric film.

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