Method for forming an opening for an interconnect structure...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S780000, C438S781000

Reexamination Certificate

active

07125793

ABSTRACT:
A method of forming an opening in a disclosed ILD is described. The ILD in one embodiment includes a matrix material and a photosensitive porogen. Hard sidewalls are formed in the ILD allowing a thin barrier layer to be used in a dual damascene copper and porous low-k without pore sealing steps.

REFERENCES:
patent: 6528409 (2003-03-01), Lopatin et al.
patent: 2002/0030297 (2002-03-01), Gallagher et al.
patent: 2003/0004218 (2003-01-01), Allen et al.
MaMe surface characterization, “Low-K Dielectrics,” (undated), 2 pages, ITC irst, Centro Per La Ricerca Scientifica & Technologica.
Iawamoto, N. et al., “Studying Ultra Low K Dielectrics: Challenges and Solutions,” Jun. 2002, 21 pages, Honeywell/SEMATECH, Star Center, Electronic Materials, Ultra Low k Workshop.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for forming an opening for an interconnect structure... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for forming an opening for an interconnect structure..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming an opening for an interconnect structure... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3712016

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.