Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2000-02-11
2002-02-12
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S303000
Reexamination Certificate
active
06346468
ABSTRACT:
BACKGROUND OF INVENTION
1) Field of the invention
This invention relates generally to fabrication of a semiconductor device and more particularly to a method for forming an L-shaped spacer using a disposable polysilicon top spacer.
2) Description of the Prior Art
As the physical geometry of semiconductors continues to shrink, the space between gate electrodes shrinks as well. The reduced space between gate electrodes can cause poor gap fill by the subsequent dielectric layer (eg inter-layer dielectric) resulting in degraded performance.
One approach which has been used to solve this problem is the use of spacers on the gate electrode sidewalls which are smaller at the top than they are at the bottom, such as L-shaped spacers. In a typical L-shaped spacer two dielectric layers (the first composed of silicon nitride and the second composed of silicon oxide) are formed over and around a gate electrode, then anisotropically etched. However, the top oxide portion of the spacer can not be easily removed without damaging oxide isolation structures. Conversly, if the top oxide portion of the spacer remains, it can be effected by post-etch wet chemical process causing inconsistent spacer shape and size across the IC and between IC's. Also, the gap filling ability of the subsequent dielectric layer is not optimized, because the aspect ratio remains high due to the presence of the oxide portion of the spacers.
Another problem with conventional L-shaped spacers is that dry etching nitride spacers can result in variations in spacer width between isolated areas and areas nested between adjacent gates. These variations in spacer width will cause unsymmetrical transistors, resulting in performance problems.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering the following patents.
U.S. Pat. No. 5,770,508 (Yeh et al.) shows a process for forming an L-shaped spacer using an oxide layer and an overlying nitride layer, anisotropically etching to form spacers, then removing the nitride layer, leaving an L-shaped oxide spacer. Ions are implanted through the L-shaped spacer to form shallow source and drain extensions under the L-shaped spacer and moderate-depth source and drain regions beyond the L-shaped spacer.
U.S. Pat. No. 5,290,720 (Chen) shows an L-shaped spacer composed of polysilicon and formed using a disposable dielectric spacers.
U.S. Pat. No. 5,472,896 (Chen et al.) shows an L-shaped spacer composed of oxide.
U.S. Pat. No. 5,153,145 (Lee et al.) shows nested L-shaped spacers composed of oxide and nitride with a convex spacer thereover.
U.S. Pat. No. 5,714,413 (Brigham et al.) shows an L-shsped shaped spacer with a silicon nitride layer.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for forming an L-shaped spacer using a disposable polysilicon top spacer.
It is another object of the present invention to provide a method for forming an L-shaped spacer which can be symmetrically etched in areas having different spacing between structures.
It is another object of the present invention to provide a method for forming an L-shaped spacer that provides for better gap filling properties of the subsequently formed, overlying dielectric layer.
It is yet another object of the present invention to provide a method for forming an L-shaped dielectric spacer which is compatible with a smaller gap between adjacent gates.
To accomplish the above objectives, the present invention provides a method for forming an L-shaped spacer using a disposable polysilicon top spacer. A semiconductor structure is provided having a gate structure thereon. A liner oxide layer is formed on the gate structure. A dielectric spacer layer, preferably comprising silicon nitride, is formed on the liner oxide layer. A disposable polysilicon spacer layer is formed on the dielectric spacer layer. The disposable polysilicon spacer layer is anisotropically etched to form disposable polysilicon top spacers. The dielectric spacer layer is then etched to form L-shaped dielectric spacers, using the disposable polysilicon top spacers as an etch mask. The disposable polysilicon top spacers are removed using a selective etching process, leaving symmetrical, L-shaped dielectric spacers which are sufficiently open to provide for good gap filling properties of the overlying dielectric layer.
The present invention provides considerable improvement over the prior art. The spacer which results from the process of the present invention is less susceptible to post-etch wet chemical processing than an oxide layer, resulting in a more uniform spacers, both across the IC and between IC's. Because the disposable polysilicontop spacers can be completely removed using a selective etch, the resulting L-shaped dielectric spacers are open and provide better gap filling properties of the subsequent dielectric layer (eg interlevel dielectric).
The present invention achieves these benefits in the context of known process technology. However, a further understanding of the nature and advantages of the present invention may be realized by reference to the latter portions of the specification and attached drawings.
REFERENCES:
patent: 5153145 (1992-10-01), Lee et al.
patent: 5290720 (1994-03-01), Chen
patent: 5472896 (1995-12-01), Chen et al.
patent: 5714413 (1998-02-01), Brigham et al.
patent: 5770508 (1998-06-01), Yeh et al.
patent: 6096657 (2000-08-01), Beckx et al.
patent: 2760130 (1998-08-01), None
Chhagan Vijai Komar
Gupta Subhash
Pradeep Yelehanka Ramachandramurthy
Chartered Semiconductor Manufacturing Ltd.
Nguyen Tuan H.
Pike Rosemary L. S.
Saile George O.
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