Method for forming an interconnection structure for ic...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S638000, C438S643000, C438S692000

Reexamination Certificate

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10940147

ABSTRACT:
A method for forming an interconnection structure in an integrated circuit includes the following steps. A dielectric layer is formed on a semiconductor substrate. An opening is formed on the dielectric layer. A barrier layer is formed over inner walls of the opening and the dielectric layer. A conductive layer is deposited on the barrier layer and filling the opening. Then, a step of planarization is performed to form the interconnection structure, such that a peripheral edge of a top surface of the interconnection structure is no lower than a top surface of the barrier layer.

REFERENCES:
patent: 6100197 (2000-08-01), Hasegawa
patent: 6136680 (2000-10-01), Lai et al.
patent: 6376376 (2002-04-01), Lim et al.
patent: 6936542 (2005-08-01), Wojtczak et al.

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