Method for forming an interconnection line in a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S623000, C438S624000, C438S702000, C257SE21579

Reexamination Certificate

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11181275

ABSTRACT:
The CD uniformity of a damascene pattern and the reliability of interconnection lines may be enhanced when a semiconductor device is manufactured by a method including: forming a first insulating layer on a semiconductor substrate, the first insulating layer having a contact hole partially exposing the substrate; forming a photoresist layer filling the contact hole; removing the photoresist layer such that the first insulating layer is exposed and a recess is formed in the contact hole; reducing, removing or substantially eliminating the recess by removing an upper portion of the first insulating layer; forming a second insulating layer having a trench exposing the photoresist layer and a portion of the first insulating layer adjacent thereto; and removing the remaining photoresist layer.

REFERENCES:
patent: 6323123 (2001-11-01), Liu et al.
patent: 6815331 (2004-11-01), Lee et al.
patent: 1020000048049 (2000-07-01), None
patent: 1020010021422 (2001-03-01), None
Horiba, Shinichi, Semiconductor Memory Device and its Manufacture, English Abstract of Korean Patent Abstract 1020010021422 A, Mar. 15, 2001, Korean Intellectual Property Office, Republic of Korea.
Yokoyama, Dakasi, Semiconductor Apparatus and Method for the Same, English Abstract of Korean Patent Abstract 1020000048049 A, Jul. 25, 2000, Korean Intellectual Property Office, Republic of Korea.
Horiba, Shinichi, Semiconductor Memory Device and its Manufacture, Supplemental Copy of Drawings for Korean Patent Publication 1020010021422 A, Mar. 15, 2001, Korean Intellectual Property Office, Republic of Korea.

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