Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-07-05
2009-11-10
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S238000, C438S740000, C257SE21548, C257SE21647, C257SE21655
Reexamination Certificate
active
07615493
ABSTRACT:
A method for forming an alignment mark comprises forming an etch stop film and an interlayer insulating film over a semiconductor substrate including a cell region and a scribe region, etching a predetermined region of the interlayer insulating film and the etch stop film to form a storage node region in the cell region and an alignment mark region in the scribe region, forming a layer for storage node over an entire surface of the resultant including the storage node region in the cell region and the alignment mark region in the scribe region, etching the layer for storage node until the interlayer insulting film is exposed, and removing the interlayer insulating film to form a capacitor in the cell region and an alignment mark in the scribe region.
REFERENCES:
patent: 6218262 (2001-04-01), Kuroi et al.
patent: 6624525 (2003-09-01), Anezaki et al.
patent: 6906374 (2005-06-01), Tanaka
patent: 6969648 (2005-11-01), Cheng et al.
patent: 10-2001-0004673 (2001-01-01), None
Hynix / Semiconductor Inc.
Nhu David
Townsend and Townsend / and Crew LLP
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