Method for forming active and gate runner trenches

Details Method for forming active and gate runner trenches Method for forming active and gate runner trenches

2011-03-08

2011-03-08

Pham, Thanh V (Department: 2894)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S039000, C438S042000, C438S717000, C438S736000, C438S942000, C438S950000, C257SE21023

Reexamination Certificate

active

07902071

ABSTRACT:
A method for forming a trench-gated field effect transistor (FET) includes the following steps. Using a first mask, defining and simultaneously forming a plurality of active gate trenches and at least one gate runner trench extending to a first depth within a silicon region such that (i) the at least one gate runner trench has a width greater than a width of each of the plurality of active gate trenches, and (ii) the plurality of active gate trenches are contiguous with the at least one gate runner trench; and using the first mask and a second mask for protecting the at least one gate runner trench, further extending only the plurality of active gate trenches to a second and final depth within the silicon region.

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