Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-09-17
2000-06-13
Booth, Richard
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438435, 438436, 438431, H01L 2176
Patent
active
06074930&
ABSTRACT:
A method for forming trench isolation in the silicon substrate is disclosed. This method allows for an improved bonding force between the sidewall silicon dioxide layer and the sidewall of the trench. After a trench is formed, sidewall silicon dioxide is grown on the sidewall of the trench by a first oxidation process. Then, PE-TEOS is deposited on the silicon substrate and the sidewall of the trench. The PE-TEOS layer around the entrance of the trench is then etched back using argon gas. The second oxidation process or the first annealing proceeds to enhance the bonding force between the sidewall silicon dioxide layer and the sidewall of the trench. After the second oxidation process or the annealing, the trench is filled with O.sub.3 -TEOS, and then PE-TEOS is deposited over the O.sub.3 -TEOS layer. Finally, the second annealing process follows.
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Cho Kyung Hawn
Kim Han Seong
Lee Won Soon
Park Chan Sik
Booth Richard
Pompey Ron
Samsung Electronics Co,. Ltd.
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