Method for forming a thin film transistor with a lightly...

Details Method for forming a thin film transistor with a lightly... Method for forming a thin film transistor with a lightly...

2000-12-27

2003-06-10

Huff, Mark F. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Making electrical device

C430S311000, C430S319000, C438S142000, C438S149000, C438S549000

Reexamination Certificate

active

06576403

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method for forming a thin film transistor (TFT) and, more particularly, to a method for forming a thin film transistor with a lightly doped drain (LDD) structure.
2. Description of the Related Art
At present, methods for forming liquid crystal display (LCD) devices and panels are mainly based on polysilicon thin film transistor technologies.
FIGS. 1A through 1F
sequentially show steps for forming a thin film transistor for an LCD device. As shown in
FIG. 1A
, a polysilicon layer
102
is formed on a glass substrate
100
. A gate insulating layer
104
and a gate electrode
106
are sequentially formed on the polysilicon layer. As an example, the gate insulating layer
104
and the gate electrode
106
can be formed by sequentially depositing nitride and polysilicon on the polysilicon layer
102
, and then patterning the deposited nitride and polysilicon layer.
Next, as shown in
FIG. 1B
, N-type impurities
108
are implanted to the polysilicon layer
102
, to form a first ion-implant region
110
, as shown in FIG.
1
C. After that, an oxide layer (not shown) is deposited on the gate insulating layer
104
and the gate electrode
106
, and the oxide layer is then patterned to form sidewall spacers
112
on both sides of the gate electrode
106
, as shown in FIG.
1
D.
Subsequently, as shown in
FIG. 1E
, using the sidewall spacers
112
as masks, N-type impurities
114
are implanted in the polysilicon layer
102
, to form a second ion-implant region
116
, as shown in FIG.
1
F. The doping concentration of the second ion-implant region
116
is higher than that of the first ion-implant region
110
. The first ion-implant region
110
with lower doping concentration is called a lightly doped drain region.
SUMMARY OF THE INVENTION
One object of the invention is to provide a method for forming a thin film transistor with a lightly doped drain structure; the manufacturing steps are simplified than in prior art methods. Therefore, the yield of the thin film transistor can be increased and the production costs can also be lowered.
In accordance with one example of the invention, the method for forming a thin film transistor comprises the steps of: forming a gate insulating layer and a gate electrode on a polysilicon layer; forming a photoresist layer with a predetermined thickness on the gate electrode and on a portion of the polysilicon layer; and implanting first conductive type impurities into the polysilicon layer so as to form a first ion-implant region and a second ion-implant region, wherein the doping concentration of the second ion-implant region is higher than that of the first ion-implant region.
In accordance with another example of the invention, the method for forming a thin film transistor comprises the steps of: forming a first polysilicon layer and a second polysilicon layer on a glass substrate, respectively corresponding to a predetermined region for first conductive type thin film transistor and a predetermined region for second conductive type thin film transistor; forming a first gate insulating layer and a first gate electrode on the first polysilicon layer; forming a second gate insulating layer and a second gate electrode on the second polysilicon layer; forming a first photoresist layer with a first predetermined thickness and a second photoresist layer with a second predetermined thickness with the use of a gray level mask, wherein the first photoresist layer is formed on the first gate electrode and on the first polysilicon layer, the second photoresist layer is formed on the second gate electrode and on a portion of the second polysilicon layer, and the first predetermined thickness is larger than the second predetermined thickness; and implanting first conductive type impurities the second polysilicon layer so as to form a first ion-implant region and a second ion-implant region in the second polysilicon layer, wherein the doping concentration of the second ion-implant region is higher than that of the first ion-implant region.


REFERENCES:
patent: 5543342 (1996-08-01), Mukai et al.
patent: 5981320 (1999-11-01), Lee
Tapered Photoresist for a Doping Profile; IBM-TDB; #NN83112682, Nov. 1, 1983.

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