Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-11-22
2004-10-12
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
Reexamination Certificate
active
06803302
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to integrated circuits and more particularly to a mechanically robust bond pad interface used in integrated circuits.
BACKGROUND OF THE INVENTION
Integrated circuits are formed on semiconductor substrates using a number of different processing operations that create the circuit elements. In order to access circuitry associated with the semiconductor substrate, bond pads are formed on the integrated circuits. Bond pads provide the means for transfer of electrical signals and power from and to the die via probe needles, bonding wires, conductive bumps, etc.
Bond pads are typically formed of a conductive metal such as aluminum, copper, or some alloy thereof. Copper is often used for the metal layers within the integrated circuit because of its improved electromigration performance and ability to support higher current density as compared to aluminum. However, copper is a non-self-passivating metal, and oxidation or corrosion of copper bond pads can occur when the die is exposed to the atmosphere or a non-hermitic package allows moisture to interact with the copper bond pad. This corrosion can degrade the ability to bond leads or bumps to the bond pads and can also cause the bond to decay and fail over time. In contrast, aluminum is self-passivating and, therefore, more resistant to degradation from atmospheric exposure. As such, aluminum is typically used to form bond pads.
In order to realize the advantages of the self-passivating character of aluminum and the superior electrical characteristics of copper, composite bond pad structures can be used in integrated circuit designs. In composite bond pad structures, copper is used for the underlying layer of the pad that interfaces with other layers in the integrated circuit. A corrosion-resistant aluminum capping layer is formed on top of the copper portion that creates a hermetic seal that protects the copper portion from atmospheric exposure. In order to physically separate the copper and aluminum portions of the composite bond pad while allowing for electrical connectivity, a relatively thin barrier metal layer may be formed at the interface.
Problems can arise in composite bond pad structures when test and probe operations are performed. To achieve good electrical continuity with the bond pad, elements such as probing needles must exert forces that can damage or displace portions of the bond pad surface. As such, the physical contact by such elements can damage the interface between the different metals comprising the composite bond pad structure. The damage produced can result in the formation of intermetallics at the copper-aluminum interface if the barrier is broken between the underlying copper layer and the aluminum capping layer. The aluminum-copper intermetallic can have undesirable characteristics including reduced physical strength and increased resistivity. In addition, if the probe exposes the underlying copper to the external ambient conditions, degradation of the copper can occur.
Another problem that can arise with bond pad structures concerns the physical force exerted on the bond pad by a probing element propagating to lower layers based on the physical couplings within the integrated circuit. Low Young's modulus dielectrics underlying the bond pad may not be able to support such stress resulting from the force propagation. Magnification of applied forces due to leveraging by extended interconnect may result in mechanical and eventual electrical failure of the semiconductor device. Such degradation due to the magnified applied forces typically occurs at interfaces within the integrated circuits such as via to metal interfaces and the like. Damage due to the application of force may also be increased when a more pliable dielectric (that having a lower Young's modulus or yield strength) surrounds the components being stressed.
Therefore, a need exists for a composite bond pad structure that is mechanically robust such that forces applied by probing or packaging operations do not cause degradation of the bond pad or propagate to internal portions of the integrated circuit where other undesirable effects may occur.
REFERENCES:
patent: 4723197 (1988-02-01), Takiar et al.
patent: 5149674 (1992-09-01), Freeman, Jr. et al.
patent: 5284797 (1994-02-01), Heim
patent: 5719448 (1998-02-01), Ichikawa
patent: 5736791 (1998-04-01), Fujiki et al.
patent: 5804883 (1998-09-01), Kim et al.
patent: 5912510 (1999-06-01), Hwang et al.
patent: 5923088 (1999-07-01), Shiue et al.
patent: 5942448 (1999-08-01), White
patent: 5989991 (1999-11-01), Lien
patent: 6187680 (2001-02-01), Costrini et al.
patent: 6191023 (2001-02-01), Chen
patent: 6197613 (2001-03-01), Kung et al.
patent: 11-186434 (1999-07-01), None
English translation of Notification of the First Office Action from the Patent Office of the People's Republic of China for SC10861 TP Chin, Date of Notification, Dec. 12, 2003.
Semiconductor International, Nov. 1999, www.semiconductor.net, “Solving Low-kIntegration Challenges”, pp. 56-57.
Kobayashi Thomas S.
Pozder Scott K.
Estrada Michelle
Fourson George
Freescale Semiconductor Inc.
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