Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2002-07-03
2004-05-25
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S530000, C438S592000, C438S664000
Reexamination Certificate
active
06740570
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a self-aligned silicide of a metal oxide semiconductor, and more particularly, to a method for forming a cobalt silicide (CoSi
2
) without increasing leakage current and decreasing breakdown voltage.
2. Description of the Prior Art
Due to increasing integrity of a semiconductor, self-aligned silicidation (also called salicidation) is introduced into a semiconductor process for avoiding the leaky junction between gate and source/drain regions. The self-aligned silicidation is used to form a silicide layer on the surfaces of the gate and the source/drain region for avoiding the leakage current.
A conventional material for the silicide layer is titanium; and a process for manufacturing the silicide layer is shown in FIG.
1
(
a
) to FIG.
1
(
d
). First, a silicon substrate
101
having a metal oxide transistor is provided, shown in FIG.
1
(
a
). The transistor comprises a gate structure
103
, a spacer
104
disposed on the sidewalls of the gate structure
103
, a source/drain region
105
disposed in at two sides of the gate structure
103
and field oxides
102
. Next, a titanium metal layer
106
is deposited on the surface of the gate structure
103
, the spacer
104
, the source/drain
105
and field oxides
102
, shown in FIG.
1
(
b
). Then, a first thermal annealing process is performed, thus the titanium metal will react with the polysilicon of the gate structure
103
and the silicon of the source/drain region
105
to form a titanium silicide layer (TiSi
2
)
108
. However, the titanium metal on the surface of the spacer
104
and field oxides
102
will not undergo the silicidation reaction, shown in FIG.
1
(
c
). Afterward, the unreacted titanium metal on the surface of the spacer
104
and field oxides
102
are removed by wet or dry etching, shown in FIG.
1
(
d
). The titanium silicide layer
108
formed by the titanium metal layer
106
reacting with the polysilicon of the gate structure
103
and the silicon of the source/drain region
105
is in C49 phase which has a high sheet resistance. Therefore, the salicidation further comprises a second thermal annealing process to transfer the titanium silicide
108
from C49 phase to C54 phase which has a lower sheet resistance.
Since the line width of a semiconductor device is becoming smaller and smaller, the sheet resistance and the junction current leakage, caused by the titanium silicide, are becoming higher and higher. Since the cobalt silicide (CoSi
2
) has a lower sheet resistance, thus the cobalt metal are widely used as a material for the silicide layer in the semiconductor process, especially below 0.25 um.
Generally, the formation of the cobalt silicide is similar to the titanium silicide. However, the nature of the cobalt silicide causes the disadvantages mentioned thereinafter. First, the cobalt metal is easy to react with oxygen, and thus the resistance will be increased. Second, the native oxide on the surface of the silicon substrate has to be removed before depositing the cobalt metal. Third, the cobalt-silicon phase is nearer the mid-bandgap level than the titanium-silicon phase. That will makes the cobalt metal or the cobalt silicide penetrate the silicon substrate and cause the spike phenomenon. Moreover, in shallow junction structure, the junction current leakage and the decreasing of the breakdown voltage are easy to be caused. Therefore, the method for forming cobalt silicide is more complex than the method for forming titanium silicide.
U.S. Pat. No. 5,047,367 discloses a method for forming a metal silicide layer by using a bilayer method. That is, a titanium layer is deposited on the surface of a silicon substrate. A cobalt layer is deposited on the surface of the titanium layer and then a thermal annealing step is performed under nitrogen gas. During the thermal annealing step, the cobalt metal will transfer to the surface of the silicon substrate to form a cobalt silicide layer. The titanium metal will transfer to the surface of the silicon substrate to react and remove native oxide (SiO
2
) and to form titanium silicide (TiSi
2
). Although the step of removing the native oxide is omitted in this method of forming the silicon nitride layer, the cobalt titanium (CoTi
2
) will be formed at the interface of the cobalt and titanium. Thus the formation of the cobalt silicide is inhibited and the junction current leakage is caused. In addition, because the cobalt is ferromagnetic, it will cause the problem of uniformity and poor reproducibility during sputtering.
U.S. Pat. Nos. 4,923,822 and 5,911,114 disclose a method for forming a cobalt silicide layer, wherein a titanium nitride (TiN) is deposited on a surface of a deposited cobalt layer as a capping layer. Therefore, the cobalt titanium, formed by the cobalt metal during silicidation and inhibits the formation of the cobalt silicide, is avoided. However, the cobalt silicide formed in the above patents still cannot solve the problems of spike phenomenon and junction current leakage. In addition, U.S. Pat. No. 5,736,461 discloses a method for forming a cobalt silicide by using titanium as a capping layer. Since titanium has a character of gettering the native oxide of the surface of the silicon substrate, it is not necessary to carry on a clean step for removing the native oxide on the surface of the silicon substrate before depositing the cobalt metal. However, the formation of the cobalt titanium and spike phenomenon also cannot be solved in this method.
SUMMARY OF THE INVENTION
An objective of the present invention is to provide a method for forming a cobalt silicide layer, wherein the cobalt metal cannot penetrate into the silicon layer because of a barrier effect, which is achieved by ionic implantation. Therefore, the cobalt silicide of the present invention can grow rapidly without increasing leakage current and decreasing breakdown voltage.
Another objective of the present invention is to provide a method for forming a cobalt silicide without a capping layer, and thus the cobalt metal reacts with the capping layer to facilitate formation of the cobalt silicide.
In order to achieve the above objects and to avoid the disadvantages of the prior art, the present invention discloses a method for forming a cobalt silicide on a metal oxide semiconductor. The method comprise the steps of:
providing a silicon substrate, comprising a gate structure, lightly doped regions disposed at two sides of the gate structure, spacer disposed on the sidewall of the gate structure and field oxides;
proceeding with a heavily doping step to form source/drain regions;
depositing a cobalt layer on the surface of field oxides, source/drain regions, spacer and the gate structure;
proceeding with an ionic implanting step; and
proceeding with a thermal annealing step to make the cobalt metal on the surface of the source/drain regions and the gate structure become the cobalt silicide and then removing unreacted cobalt on the surface of the spacer and field oxides.
A feature of the present invention is to perform an ionic implanting step before carrying on the self-aligned silicidation. The implanted ion of the present invention, such as fluorine, chlorine, bromine, iodine, boron and trifluroborane, will react with the silicon on the surface of the gate structure and the silicon substrate, and a barrier effect will be formed during the silicidation. Therefore, the spike phenomenon because of the cobalt or the cobalt silicide penetrating into the gate structure or the source/drain regions is prevented. Thus, the junction leakage current is avoided and the breakdown voltage of the metal oxide semiconductor will not be lowered.
The foregoing and other objects and advantages of the invention and the manner in which the same are accomplished will become clearer based on the following detailed description taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4923822 (1990-05-01), Wang et al.
patent: 5047367 (1991-09-01), Wei et al.
patent: 57364
Chang Ming-Lun
Chen Wei-Fan
Liao Wen-Shiang
Chaudhari Chandra
Ladas & Parry
Winbond Electronics Corporation
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