Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1997-08-20
2001-01-16
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S848000, C264S272140, C264S272150, C264S272170, C264S154000, C425S120000, C425S130000, C425S544000
Reexamination Certificate
active
06173490
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to improved methods and devices for applying protective packaging to integrated circuits. More particularly, panel based encapsulation wherein a plurality of distinct integrated circuits packages are encapsulated within a single molding chamber is described.
BACKGROUND OF THE INVENTION
Semiconductor based integrated circuits dies are created from a silicon wafer through the employment of various etching, doping, and depositing steps that are well known in the art. Ultimately, the integrated circuit may be packaged by forming an encapsulant around the integrated circuit so as to form a packaged integrated circuit having a variety of pinouts or mounting and interconnection schemes. Plastic is often utilized as an encapsulant. Integrated circuit packages that utilize plastic as an encapsulant are generally less expensive then other packaging options.
Recently, efforts to improve packaging efficiency has resulted in the use of substrate panels during the packaging process. By way of example, substrate panels are commonly used in grid array and chip scale type packages.
FIG. 1A
is an illustration of a portion of a panel of integrated circuits
100
including a plurality of integrated circuits
102
mounted to a substrate panel
101
. The substrate
101
typically provides both mechanical support for the integrated circuits
102
during the encapsulation procedure as well as electrically conductive paths between each of the plurality of integrated circuits
102
and external circuitry (not shown).
One typical arrangement for encapsulating panel based integrated circuits utilizes a conventional mold
150
as shown in FIG.
1
B. The conventional mold may be used to encapsulate a plurality of groups of integrated circuits
102
,
103
substantially simultaneously. As shown, a pot
120
feeds molding compound
116
contained within pot
120
to each of a pair of encapsulation regions of
122
and
124
by way of runners exemplified by runners
130
and
140
. The portions of substrates
100
and
101
that are needed to facilitate routing of the runners are often effectively wasted, which is a significant concern since the substrate material can be very expensive.
Another typical arrangement for encapsulating panel based integrated circuits utilizes a gang pot mold
155
as shown in FIG.
1
C. In this embodiment, molding compound
170
is fed into one or more uniform reservoirs
180
each containing a plurality of integrated circuits
190
mounted upon a substrate panel
192
as well as uniform reservoirs
182
each containing a plurality of integrated circuits
188
mounted upon a substrate
194
. Unfortunately, the uniform molding of a plurality of distinct integrated circuits may cause significant warpage of the substrate panel which has an adverse effect on the singulation process. This warpage is due to the stresses induced by the setting molding compound since there is no effective stress relief afforded by the substantially uniform cross sectional area of molding compound
170
covering integrated circuits. Additionally, the uniform molding obscures the locations of each of the plurality of integrated circuits which makes subsequent singulation difficult and time consuming.
In view of the foregoing, it would be desirable to provide more efficient arrangements for encapsulating panels of integrated circuits.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and in accordance with the purpose of the present invention, a method and an apparatus for forming a panel of packaged integrated circuits is disclosed. In one embodiment, a substrate panel having an array of integrated circuits mounted thereon is placed in a mold having a molding chamber. The molding chamber has a multiplicity of adjacent package recesses flowably interconnected by way of a plurality of molding compound flowgates. Each package recess is suitable for receiving at least one associated integrated circuit. A molding compound is passed into the molding chamber by way of a mold gate such that at least some of the molding compound passes through a plurality of different package recesses by way of their associated flowgates. After the molding is complete, the packaged integrated circuits may be singulated by any suitable method such as by a sawing or a breaking operation.
In another aspect of the present invention, a mold for forming a panel of packaged integrated circuits is described. The mold includes a mold body having a molding chamber with a plurality of ridges that define a multiplicity of package recesses within the molding chamber. The multiplicity of package recesses are flowably interconnected through flowgates formed by the ridges. The mold further includes a mold gate suitable for passing a molding compound into the molding chamber and a gas vent coupled to the molding chamber to allow gases to escape from the molding chamber during a molding operation.
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Drummond Fred
Lee Shaw Wei
Takiar Hem P.
Arbes Carl J.
Beyer Weaver & Thomas LLP
National Semiconductor Corporation
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